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參數(shù)資料
| 型號： | SAA7121 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 顏色信號轉(zhuǎn)換 |
| 英文描述： | Digital Video Encoder (ConDENC) |
| 中文描述： | COLOR SIGNAL ENCODER, PQFP44 |
| 封裝： | PLASTIC, SOT-307, QFP-44 |
| 文件頁數(shù)： | 18/32頁 |
| 文件大小： | 225K |
| 代理商： | SAA7121 |
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1997 Jan 06
18
Philips Semiconductors
Preliminary specification
Digital Video Encoder (ConDENC)
SAA7120; SAA7121
Table 22
Subaddress 63 to 66 (four bytes to program subcarrier frequency)
Note
1.
Examples:
a) NTSC-M: f
fsc
= 227.5, f
llc
= 1716
→
FSC = 569408543 (21F07C1FH).
b) PAL-B/G: f
fsc
= 283.7516, f
llc
= 1728
→
FSC = 705268427 (2A098ACBH).
Table 23
Subaddress 67 to 6A
Table 24
Subaddress 6B
DATA BYTE
DESCRIPTION
CONDITIONS
REMARKS
FSC0 to FSC3
f
fsc
= subcarrier frequency (in
multiples of line frequency);
f
llc
= clock frequency (in multiples
of line frequency)
,
rounded up; see note 1
FSC3 = most significant byte
FSC0 = least significant byte
DATA BYTE
DESCRIPTION
REMARKS
L21O0
L21O1
L21E0
L21E1
first byte of captioning data, odd field
second byte of captioning data, odd field
first byte of extended data, even field
second byte of extended data, even field
LSBs of the respective bytes are encoded
immediately after run-in and framing code, the
MSBs of the respective bytes have to carry the
parity bit, in accordance with the definition of
Line 21 encoding format.
DATA BYTE
LOGIC
LEVEL
DESCRIPTION
PRCV2
0
polarity of RCV2 as output is active HIGH, rising edge is taken when input, respectively;
default after reset
polarity of RCV2 as output is active LOW, falling edge is taken when input, respectively
pin RCV2 is switched to input; default after reset
pin RCV2 is switched to output
if ORCV2 = HIGH, pin RCV2 provides an HREF signal (Horizontal Reference pulse that is
defined by RCV2S and RCV2E, also during vertical blanking Interval); default after reset
1
0
1
0
ORCV2
CBLF
if ORCV2 = LOW and bit SYMP = LOW, signal input to RCV2 is used for horizontal
synchronization only (if TRCV2 = 1); default after reset
if ORCV2 = HIGH, pin RCV2 provides a ‘Composite-Blanking-Not’ signal, for example a
reference pulse that is defined by RCV2S and RCV2E, excluding Vertical Blanking Interval,
which is defined by FAL and LAL
1
if ORCV2 = LOW and bit SYMP = LOW, signal input to RCV2 is used for horizontal
synchronization (if TRCV2 = 1) and as an internal blanking signal
polarity of RCV1 as output is active HIGH, rising edge is taken when input; default after reset
polarity of RCV1 as output is active LOW, falling edge is taken when input
pin RCV1 is switched to input; default after reset
pin RCV1 is switched to output
horizontal synchronization is taken from RCV1 port (at bit SYMP = LOW) or from decoded
frame sync of “CCIR 656”input (at bit SYMP = HIGH); default after reset
horizontal synchronization is taken from RCV2 port (at bit SYMP = LOW)
defines signal type on pin RCV1; see Table 25
PRCV1
0
1
0
1
0
ORCV1
TRCV2
1
SRCV1
FSC
f
f
llc
-------
2
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相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SAA7124HZ | Digital Video Encoder ECO-DENC |
| SAA7124 | Digital Video Encoder ECO-DENC |
| SAA7124H | Digital Video Encoder ECO-DENC |
| SAA7125 | Digital Video Encoder ECO-DENC |
| SAA7125H | Digital Video Encoder ECO-DENC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SAA7121H | 制造商:NXP Semiconductors 功能描述: |
| SAA7121H/V2 | 制造商:NXP Semiconductors 功能描述: |
| SAA7121H/V2,518 | 功能描述:視頻 IC SAA7121H/QFP44/REEL13DP//V2 RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
| SAA7121H/V2,557 | 功能描述:視頻 IC DIG VID ENCODER NTSC PAL RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
| SAA7121H/V2557 | 制造商:NXP Semiconductors 功能描述:IC VIDEO ENCODER DIGITAL 44-QFP |
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