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參數(shù)資料
| 型號： | SAA7188A |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Digital Video Encoder (DENC2-M)(數(shù)字視頻編碼器(DENC2-M)) |
| 中文描述： | 數(shù)字視頻編碼器（DENC2米）（數(shù)字視頻編碼器（DENC2米）） |
| 文件頁數(shù)： | 27/36頁 |
| 文件大?。?/td> | 252K |
| 代理商： | SAA7188A |
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1996 Jul 08
27
Philips Semiconductors
Preliminary specification
Digital Video Encoder (DENC2-M)
SAA7188A
Notes
1.
2.
3.
4.
5.
At maximum supply voltage with highly active input signals.
The levels have to be measured with load circuits of 1.2 k
to 3.0 V (standard TTL load) and C
L
= 25 pF.
The data is for both input and output direction.
With LLC in input mode. In output mode, with a crystal connected to XTALO/XTALI duty factor is typically 50%.
If an internal oscillator is used, crystal deviation of nominal frequency (f
n
) is directly proportional to the deviation of
subcarrier frequency and line/field frequency.
The value is calculated via equation
The value depends on the clock frequency. The numbers given are calculated with f
LLC
= 27 MHz.
The values given are calculated via equation
The falling edge of DTACK will always occur 1
×
LLC after data is valid.
10. For full digital range, without load, V
DDA
= 5.0 V. The typical voltage swing is 2.0 V, the typical minimum output
voltage (digital zero at DAC) is 0.2 V.
6.
7.
8.
9.
CHROMA, Y and CVBS outputs
V
o(p-p)
R
I
R
L
B
ILE
DLE
output signal voltage (peak-to-peak value)
internal serial resistance
output load resistance
output signal bandwidth of DACs
LF integral linearity error of DACs
LF differential linearity error of DACs
note 10
1.9
18
80
10
2.1
35
±
2
±
1
V
MHz
LSB
LSB
3 dB
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
t
t
SU
t
HD
+
=
t
dmax
t
OD
n
t
LLC
t
LLC
t
SU
+
+
×
+
=
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