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參數(shù)資料
| 型號： | SAA7201 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Integrated MPEG2 AVG Decoder(綜合MPEG音頻視頻圖表譯碼器) |
| 中文描述： | 集成MPEG2解碼器的AVG（綜合的MPEG音頻視頻圖表譯碼器） |
| 文件頁數(shù)： | 15/36頁 |
| 文件大?。?/td> | 292K |
| 代理商： | SAA7201 |
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1997 Jan 29
15
Philips Semiconductors
Objective specification
Integrated MPEG2 AVG decoder
SAA7201
Video decoder
The video decoding unit provides all actions required for
compliant decoding of MPEG2 main level, main profile
coded video bit streams. The decoding process consists of
fixed and variable length decoding, run length decoding,
inverse quantization, inverse discrete cosine
transformation, motion compensation and interpolation.
In general the arithmetic decoding result is stored as
reference picture in the external memory.
Decoded B-frames are only stored for the conversion from
the frame coded macro block (MB) to the scanning line
format. In many cases a field storage is sufficient for this
conversion but in some cases the user might decide to use
a full frame storage to enable chroma frame up-conversion
or full performance 3 : 2 pull-down in 60 Hz systems.
Obviously when using less memory for the video decoding
process more memory is available for non-video decoding
tasks.
The Frame Buffer Management unit (FBM) manages the
allocation of frame buffers in external SDRAM for both
video decoding and display unit and can be programmed
to use less memory in not fully MP@ML bitstreams:
smaller pictures (e.g. 544
×
576), simple profile, etc.
Apart from decoding compliant MPEG video streams the
decoder deals with some trick modes. Supported are field
or frame freeze at I or P pictures or freeze field on
B-pictures. In the latter case decoding will continue as a
background process and the output can be restarted at
any moment. When receiving non-compliant MPEG
streams the decoder can be switched to a scanning mode
in which only I or I + P frames are decoded while skipping
all other pictures. In the single step mode, the decoder
decodes just one frame and awaits a next step command.
The functional diagram of the video decoding unit is shown
in Fig.7.
Fig.7 Video decoding unit.
handbook, full pagewidth
VLD
FLD
IZZ
IQ
IDCT
MC
INTERP
FBM
to display
unit
to external
memory
from reference
memory
from
input
buffer
MGD327
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| SAA7201H | Integrated MPEG2 AVG decoder |
| SAA7212 | Integrated MPEG2 AVG Decoder(綜合MPEG音頻視頻圖表譯碼器) |
| SAA7212H | Integrated MPEG AVG decoder |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SAA7201H | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Integrated MPEG2 AVG decoder |
| SAA7205 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:MPEG-2 systems demultiplexer |
| SAA7205H | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:MPEG-2 systems demultiplexer |
| SAA7206 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:DVB compliant descrambler |
| SAA7206H | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:DVB compliant descrambler |
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