參數(shù)資料
型號(hào)： SAA7706H/N107S,518
廠商： NXP Semiconductors
文件頁(yè)數(shù)： 10/52頁(yè)
文件大?。?/td> 0K
描述： IC DSP CAR RADIO 80QFP
標(biāo)準(zhǔn)包裝： 500
類型： 汽車(chē)信號(hào)處理器
接口： I²C，I²:S，LSB，SPDIF
電壓 - 輸入/輸出： 3.30V
電壓 - 核心： 3.30V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 80-BQFP
供應(yīng)商設(shè)備封裝： 80-QFP（14x20）
包裝： 帶卷 (TR)
2001 Mar 05
18
Philips Semiconductors
Product specication
Car radio Digital Signal Processor (DSP)
SAA7706H
8.4
Signal path from FM_MPX input to IAC and
stereo decoder
The FM_MPX signal is after selection available at one of
three ADCs (ADC1, 2 and 3). The multiplex FM signal is
converted to the digital domain in ADC1, 2 and 3 through
a bitstream ADC. Improved performance for FM stereo
can be achieved by means of adapting the noise shaper
curve of the ADC to a higher bandwidth.
The first decimation takes place in two down-sample
filters. These decimation filters are switched by means of
the I2C-bus bit wide_narrow in the wide or narrow band
position. In the event of FM reception it must be in the
narrow position.
After selection of one of the ADCs, the FM_MPX path it is
followed by the IAC and the FM stereo decoder. One of the
two MPX filter outputs contains the multiplex signal with a
frequency range of 0 to 60 kHz. The overall low-pass
frequency response of the decimation filters is shown in
Fig.10.
handbook, full pagewidth
140
0
100
MGT466
300
500
400
200
120
100
80
20
0
60
40
f (kHz)
α
(dB)
Fig.10 Overall frequency response of ADC1, ADC2 and decimation filters.
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