參數(shù)資料
型號: SAA7715AH
廠商: NXP SEMICONDUCTORS
元件分類: 數(shù)字信號處理
英文描述: Digital Signal Processor
中文描述: 0-BIT, 24.576 MHz, OTHER DSP, PQFP44
封裝: 10 X 10 MM, 1.75 MM HEIGHT, PLASTIC, SOT-307-2, QFP-44
文件頁數(shù): 10/36頁
文件大?。?/td> 167K
代理商: SAA7715AH
2003 Mar 13
10
Philips Semiconductors
Preliminary specification
Digital Signal Processor
SAA7715AH
8.3
The Filter Stream DAC (FSDAC)
The FSDAC is a semi-digital reconstruction filter that
converts the 1-bit data stream of the noise shaper to an
analog output voltage. The filter coefficients are
implemented as current sources and are summed at
virtual ground of the output operational amplifier. In this
way very high signal-to-noise performance and low clock
jitter sensitivity is achieved. A post-filter is not needed due
to the inherent filter function of the DAC. On-board
amplifiers convert the FSDAC output current to an output
voltage signal capable of driving a line output.
The output voltage of the FSDAC scales proportionally
with the power supply voltage.
8.3.1
I
NTERPOLATION FILTER
The digital filter interpolates from 1 to 64f
s
by means of a
cascade of a recursive filter and an FIR filter.
Table 5
Digital interpolation filter characteristics
8.3.2
N
OISE SHAPER
The 5th-order noise shaper operates at 64f
s
. It shifts
in-band quantization noise to frequencies well above the
audio band. This noise shaping technique enables high
signal-to-noise ratios to be achieved. The noise shaper
output is converted into an analog signal using a filter
stream digital-to-analog converter.
8.3.3
F
UNCTION OF PIN
POM
With pin POM it is possible to switch off the reference
current of the DAC. The capacitor on pin POM determines
the time after which this current has a soft switch-on. So at
power-on the current audio signal outputs are always
muted. The loading of the external capacitor is done in two
stages via two different current sources. The loading starts
at a current level that is lower than the current loading after
the voltage on pin POM has passed a particular level. This
results in an almost dB-linear behaviour. This prevents
‘plop’ effects during power on/off.
8.3.4
P
OWER OFF PLOP SUPPRESSION
To avoid plops in a power amplifier, the supply voltage of
the analog part of the DAC and the rest of the chip can be
fedfromaseparatesupplyof3.3 V.A capacitorconnected
to this supply enables to provide power to the analog part
at the moment the digital voltage is switching off fast.
In this event the output voltage will decrease gradually
allowing the power amplifier some extra time to switch off
without audible plops.
8.3.5
P
IN
VREFDA
FOR INTERNAL REFERENCE
With two internal resistors half the supply voltage V
DDA1
is
obtainedandusedasaninternalreference.Thisreference
voltage is used as DC voltage for the output operational
amplifiers and as reference for the DAC. In order to obtain
the lowest noise and to have the best ripple rejection, a
filter capacitor has to be added between this pin and
ground, preferably close to the analog pin V
SSA1
.
8.3.6
S
UPPLY OF THE ANALOG OUTPUTS
The entire analog circuitry of the DACs and the OPAMPS
are supplied by 2 supply pins, V
DDA1
and V
SSA1
. The
V
DDA1
must have sufficient decoupling to prevent THD
degradation and to ensure a good Power Supply Rejection
Ratio (PSRR). The digital part of the DAC is fully supplied
from the chip core supply.
8.4
External control pins
The flags DSP_INOUT5 to DSP_INOUT7 are available as
external pins. The flags can be used by the DSP
depending on the downloaded software.
ITEM
CONDITIONS
VALUE (dB)
±
0.03
50
116.5
3.5
Pass band ripple
Stop band
Dynamic range
Gain
0 to 0.45f
s
>0.55f
s
0 to 0.45f
s
DC
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