Semiconductor Group
31
09.96
C509-L
Compare /
Capture
Unit (CCU)
Timer 2
cont’d
CAFR
5)
CRCH
CRCL
COMSETL
COMSETH
COMCLRL
COMCLRH
SETMSK
CLRMSK
CTCON
2)
CTRELH
5)
CTRELL
5)
CT1RELH
5)
CT1RELL
5)
TH2
TL2
T2CON
2)
CT1CON
2)
PRSC
2)
Capture 1, Falling/Rising Edge Register
Comp./Rel./Capt. Reg. High Byte
Comp./Rel./Capt. Reg. Low Byte
Compare Set Register, Low Byte
Compare Set Register, High Byte
Compare Clear Register, Low Byte
Compare Clear Register, High Byte
Compare Set Mask Register
Compare Clear Mask Register
Compare Timer Control Register
Compare Timer Rel. Reg., High Byte
Compare Timer Rel. Reg., Low Byte
Compare Timer 1 Rel. Reg., High Byte
Compare Timer 1 Rel. Reg., Low Byte
Timer 2, High Byte
Timer 2, Low Byte
Timer 2 Control Register
Compare Timer 1 Control Register
Prescaler Control Register
F7H
CBH
CAH
A1H
A2H
A3H
A4H
A5H
A6H
E1H
DFH
DEH
DFH
DEH
CDH
CCH
C8H
1)
BCH
B4H
D8H
1)
87H
99H
98H
1)
AAH
BAH
9CH
9BH
9DH
BBH
A8H
1)
B8H
1)
A9H
B9H
86H
84H
85H
00H
00H
00H
00H
00H
00H
00H
00H
00H
01000000B
00H
00H
00H
00H
00H
00H
00H
X1XX0000B
11010101B
3)
00H
00H
XXH
00H
D9H
XXXXXX11B
3)
XXH
01000000B
3)
00H
XXXXXX11B
00H
00H
00H
0X000000B
00H
00H
00H
3
)
3)
Serial
Channels
ADCON0
2)
PCON
2)
S0BUF
S0CON
S0RELL
S0RELH
S1BUF
S1CON
S1RELL
S1RELH
A/D Converter Control Register
Power Control Register
Serial Channel 0 Buffer Register
Serial Channel 0 Control Register
Serial Channel 0 Reload Reg., Low Byte
Serial Channel 0 Reload Reg., High Byte
Serial Channel 1 Buffer Register
Serial Channel 1 Control Register
Serial Channel 1 Reload Reg., Low Byte
Serial Channel 1 Reload Reg., High Byte
3
)
3
)
3)
Watchdog
IEN0
2)
IEN1
2)
IP0
2)
IP1
2)
WDTREL
WDTL
6)
WDTH
6)
Interrupt Enable Register 0
Interrupt Enable Register 1
Interrupt Priority Register 0
Interrupt Priority Register 1
Watchdog Timer Reload Register
Watchdog Timer Register, Low Byte
Watchdog Timer Register, High Byte
3
)
1)
Bit-addressable special function registers
2)
This special function register is listed repeatedly since some bits of it also belong to other functional blocks.
3)
X means that the value is indeterminate or the location is reserved
4)
Register is mapped by bit PDIR.
5)
Register is mapped by bit RMAP.
6)
Registers are only readable and cannot be written.
Table 4
Special Function Registers - Functional Blocks (cont’d)
Block
Symbol
Name
Address
Contents after
Reset