參數(shù)資料
型號： SAF-C161O-LM 3V HA
廠商： Infineon Technologies
文件頁數(shù)： 10/66頁
文件大?。?/td> 0K
描述： IC MCU 16BIT ROM/LESS MQFP-80-1
標準包裝： 1
系列： C16xx
核心處理器： C166
芯體尺寸： 16-位
速度： 20MHz
連通性： EBI/EMI，SPI，UART/USART
外圍設(shè)備： POR，PWM，WDT
輸入/輸出數(shù)： 63
程序存儲器類型： ROMless
RAM 容量： 2K x 8
電壓 - 電源 (Vcc/Vdd)： 3 V ~ 3.6 V
振蕩器型： 外部
工作溫度： -40°C ~ 85°C
封裝/外殼： 80-QFP
包裝： 剪切帶 (CT)
產(chǎn)品目錄頁面： 736 (CN2011-ZH PDF)
其它名稱： SAF-C161O-LM3VHACT
SAF-C161O-LM3VHACT-ND
SAF-C161O-LM3VHAINCT
C161K
C161O
Data Sheet
14
V2.0, 2001-01
Interrupt System
With an interrupt response time within a range from just 5 to 12 CPU clocks (in case of
internal program execution), the C161K/O is capable of reacting very fast to the
occurrence of non-deterministic events.
The architecture of the C161K/O supports several mechanisms for fast and flexible
response to service requests that can be generated from various sources internal or
external to the microcontroller. Any of these interrupt requests can be programmed to
being serviced by the Interrupt Controller or by the Peripheral Event Controller (PEC).
In contrast to a standard interrupt service where the current program execution is
suspended and a branch to the interrupt vector table is performed, just one cycle is
‘stolen’ from the current CPU activity to perform a PEC service. A PEC service implies a
single byte or word data transfer between any two memory locations with an additional
increment of either the PEC source or the destination pointer. An individual PEC transfer
counter is implicity decremented for each PEC service except when performing in the
continuous transfer mode. When this counter reaches zero, a standard interrupt is
performed to the corresponding source related vector location. PEC services are very
well suited, for example, for supporting the transmission or reception of blocks of data.
The C161K/O has 8 PEC channels each of which offers such fast interrupt-driven data
transfer capabilities.
A separate control register which contains an interrupt request flag, an interrupt enable
flag and an interrupt priority bitfield exists for each of the possible interrupt sources. Via
its related register, each source can be programmed to one of sixteen interrupt priority
levels. Once having been accepted by the CPU, an interrupt service can only be
interrupted by a higher prioritized service request. For the standard interrupt processing,
each of the possible interrupt sources has a dedicated vector location.
Fast external interrupt inputs are provided to service external interrupts with high
precision requirements. These fast interrupt inputs feature programmable edge
detection (rising edge, falling edge or both edges).
Software interrupts are supported by means of the ‘TRAP’ instruction in combination with
an individual trap (interrupt) number.
Table 3 shows all of the possible C161K/O interrupt sources and the corresponding
hardware-related interrupt flags, vectors, vector locations and trap (interrupt) numbers.
Note: Interrupt nodes which are not used by associated peripherals, may be used to
generate software controlled interrupt requests by setting the respective interrupt
request bit (xIR).
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SAFC161OLM3VHAXT 制造商:Infineon Technologies AG 功能描述:MCU 16-Bit C166 CISC/RISC ROMLess 3.3V 80-Pin MQFP
SAFC161OLMHA 制造商:Infineon Technologies AG 功能描述:
SAF-C161O-LM-HA 制造商:Rochester Electronics LLC 功能描述:- Bulk
SAFC161OLMHATR 制造商:Infineon Technologies AG 功能描述:
SAFC161OLMHAX 制造商:Infineon Technologies AG 功能描述:
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