參數(shù)資料
型號(hào): SAF-C161O-LM 3V HA
廠商: Infineon Technologies
文件頁(yè)數(shù): 19/66頁(yè)
文件大?。?/td> 0K
描述: IC MCU 16BIT ROM/LESS MQFP-80-1
標(biāo)準(zhǔn)包裝: 1
系列: C16xx
核心處理器: C166
芯體尺寸: 16-位
速度: 20MHz
連通性: EBI/EMI,SPI,UART/USART
外圍設(shè)備: POR,PWM,WDT
輸入/輸出數(shù): 63
程序存儲(chǔ)器類型: ROMless
RAM 容量: 2K x 8
電壓 - 電源 (Vcc/Vdd): 3 V ~ 3.6 V
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 80-QFP
包裝: 剪切帶 (CT)
產(chǎn)品目錄頁(yè)面: 736 (CN2011-ZH PDF)
其它名稱: SAF-C161O-LM3VHACT
SAF-C161O-LM3VHACT-ND
SAF-C161O-LM3VHAINCT
C161K
C161O
Data Sheet
22
V2.0, 2001-01
Instruction Set Summary
Table 5 lists the instructions of the C161K/O in a condensed way.
The various addressing modes that can be used with a specific instruction, the operation
of the instructions, parameters for conditional execution of instructions, and the opcodes
for each instruction can be found in the “C166 Family Instruction Set Manual”.
This document also provides a detailed description of each instruction.
Table 5
Instruction Set Summary
Mnemonic
Description
Bytes
ADD(B)
Add word (byte) operands
2 / 4
ADDC(B)
Add word (byte) operands with Carry
2 / 4
SUB(B)
Subtract word (byte) operands
2 / 4
SUBC(B)
Subtract word (byte) operands with Carry
2 / 4
MUL(U)
(Un)Signed multiply direct GPR by direct GPR (16-16-bit) 2
DIV(U)
(Un)Signed divide register MDL by direct GPR (16-/16-bit) 2
DIVL(U)
(Un)Signed long divide reg. MD by direct GPR (32-/16-bit) 2
CPL(B)
Complement direct word (byte) GPR
2
NEG(B)
Negate direct word (byte) GPR
2
AND(B)
Bitwise AND, (word/byte operands)
2 / 4
OR(B)
Bitwise OR, (word/byte operands)
2 / 4
XOR(B)
Bitwise XOR, (word/byte operands)
2 / 4
BCLR
Clear direct bit
2
BSET
Set direct bit
2
BMOV(N)
Move (negated) direct bit to direct bit
4
BAND, BOR,
BXOR
AND/OR/XOR direct bit with direct bit
4
BCMP
Compare direct bit to direct bit
4
BFLDH/L
Bitwise modify masked high/low byte of bit-addressable
direct word memory with immediate data
4
CMP(B)
Compare word (byte) operands
2 / 4
CMPD1/2
Compare word data to GPR and decrement GPR by 1/2
2 / 4
CMPI1/2
Compare word data to GPR and increment GPR by 1/2
2 / 4
PRIOR
Determine number of shift cycles to normalize direct
word GPR and store result in direct word GPR
2
SHL / SHR
Shift left/right direct word GPR
2
ROL / ROR
Rotate left/right direct word GPR
2
ASHR
Arithmetic (sign bit) shift right direct word GPR
2
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