參數(shù)資料
型號(hào): SAF-XE164K-48F66L
廠商: INFINEON TECHNOLOGIES AG
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, MICROCONTROLLER, PQFP100
封裝: 0.50 MM PITCH, GREEN, PLASTIC, LQFP-100
文件頁(yè)數(shù): 110/113頁(yè)
文件大小: 1498K
代理商: SAF-XE164K-48F66L
XE164x
XE166 Family Derivatives
Electrical Parameters
Preliminary
Data Sheet
94
V2.0, 2008-03
4.6.3
External Clock Drive
These parameters specify the external clock for the XE164. The clock signal can be
supplied either to pin P2.9 or to pin XTAL1.
Figure 20
External Clock Drive XTAL1
Note: If the on-chip oscillator is used together with a crystal or a ceramic resonator, the
oscillator frequency is limited to a range from 4 MHz to 16 MHz.
It is strongly recommended to measure the oscillation allowance (negative
resistance) in the final target system (layout) to determine the optimum
parameters for oscillator operation. Please refer to the limits specified by the
crystal supplier.
When driven by an external clock signal it will accept the specified input frequency
range. Operation at input frequencies below 4 MHz is possible but is only verified
by design (not subject to production test).
Table 25
External Clock Drive Characteristics
(Operating Conditions apply)
Parameter
Symbol
Limit Values
Unit Note / Test
Condition
Min.
Max.
Oscillator period
t
OSC
SR 25
2501)
1) The maximum limit is only relevant for PLL operation to ensure the minimum input frequency for the PLL.
ns
High time2)
2) The clock input signal must reach the defined levels
V
ILC and VIHC (for XTAL1) or VIL and VIH for P2.9.
t
1
SR 6–ns
Low time2)
t
2
SR 6–ns
Rise time2)
t
3
SR –8ns
Fall time2)
t
4
SR –8ns
MCT05572
t
1
t
2
t
OSC
t
3
t
4
0.5
V
DDI
V
ILC
V
IHC
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