參數(shù)資料
型號(hào): SAK-C164CH-8FM
廠商: INFINEON TECHNOLOGIES AG
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 25 MHz, MICROCONTROLLER, PQFP80
封裝: 0.65 MM PITCH, METRIC, PLASTIC, QFP-80
文件頁(yè)數(shù): 54/74頁(yè)
文件大?。?/td> 917K
代理商: SAK-C164CH-8FM
&
Data Sheet
56
1999-08
Data valid to WR
W
22
CC
20 +
W
C
2TCL - 20
+
W
C
–ns
Data hold after WR
W
23
CC
26 +
W
F
2TCL - 14
+
W
F
–ns
ALE rising edge after RD,
WR
W
25
CC
26 +
W
F
2TCL - 14
+
W
F
–ns
Address hold after RD,
WR
W
27
CC
26 +
W
F
2TCL - 14
+
W
F
–ns
ALE falling edge to CS
1)
W
38
CC
-4 -
W
A
10 -
W
A
-4 -
W
A
10 -
W
A
ns
CS low to Valid Data In 1)
W
39
SR
40
+
W
C
+ 2
W
A
3TCL - 20
+
W
C + 2WA
ns
CS hold after RD, WR
1)
W
40
CC
46 +
W
F
3TCL - 14
+
W
F
–ns
ALE fall. edge to RdCS,
WrCS (with RW delay)
W
42
CC
16 +
W
A
TCL - 4
+
W
A
–ns
ALE fall. edge to RdCS,
WrCS (no RW delay)
W
43
CC
-4 +
W
A
–-4
+
W
A
–ns
Address float after RdCS,
WrCS (with RW delay)
W
44
CC
0
–0ns
Address float after RdCS,
WrCS (no RW delay)
W
45
CC
20
TCL
ns
RdCS to Valid Data In
(with RW delay)
W
46
SR
16 +
W
C
2TCL - 24
+
W
C
ns
RdCS to Valid Data In
(no RW delay)
W
47
SR
36 +
W
C
3TCL - 24
+
W
C
ns
RdCS, WrCS Low Time
(with RW delay)
W
48
CC
30 +
W
C
2TCL - 10
+
W
C
–ns
RdCS, WrCS Low Time
(no RW delay)
W
49
CC
50 +
W
C
3TCL - 10
+
W
C
–ns
Multiplexed Bus (continued)
(Operating Conditions apply)
ALE cycle time = 6 TCL + 2
W
A + WC + WF (120 ns at 25 MHz CPU clock without waitstates)
Parameter
Symbol
Max. CPU Clock
= 25 MHz
Variable CPU Clock
1 / 2TCL = 1 to 25 MHz
Unit
min.
max.
min.
max.
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