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| 型號： | SAK-C164SV-2RF |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, MROM, 20 MHz, MICROCONTROLLER, PQFP64 |
| 封裝： | PLASTIC, TQFP-64 |
| 文件頁數(shù)： | 50/65頁 |
| 文件大?。?/td> | 932K |
| 代理商： | SAK-C164SV-2RF |
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C164SV
Data Sheet
50
V1.0, 2003-04
Preliminary
A/D Converter Characteristics
(Operating Conditions apply)
Table 13
A/D Converter Characteristics
Parameter
Symbol
Limit Values
Unit Test
Conditions
min.
max.
Analog reference supply
VAREF SR 4.0
VDD + 0.1 V
Analog reference ground
VAGNDSR VSS - 0.1 VSS + 0.2 V
–
Analog input voltage range
VAIN SR VAGND
VAREF
V
1)
1) V
AIN may exceed VAGND or VAREF up to the absolute maximum ratings. However, the conversion result in
these cases will be X000H or X3FFH, respectively.
Basic clock frequency
fBC
0.5
6.25
MHz 2)
2) The limit values for f
BC must not be exceeded when selecting the CPU frequency and the ADCTC setting.
Conversion time3)
3) This parameter includes the sample time t
S, the time for determining the digital result and the time to load the
result register with the conversion result.
Values for the basic clock
This parameter depends on the ADC control logic. It is not a real maximum value, but rather a fixum.
tC10
CC –
40
tBC +
tS + 2tCPU
–
10-bit conv.
tCPU = 1 / fCPU
tC12
CC –
46
tBC +
tS + 2tCPU
–
12-bit conv.4)
tCPU = 1 / fCPU
4) For 12-bit conversions the CPU clock frequency must be limited to f
CPU ≤ 20 MHz to achieve the specified TUE
limits.
Calibration time after reset
tCAL CC –
3328
tBC
–
5)
5) During the reset calibration conversions can be executed (with the current accuracy). The time required for
these conversions is added to the total reset calibration time.
Total unadjusted error
TUE
CC –
±2
LSB 10-bit conv.6)7)
6) TUE is tested at V
AREF = VDD +0.1 V, VAGND = 0 V. It is guaranteed by design for all other voltages within the
defined voltage range.
The specified TUE is guaranteed only if the absolute sum of input overload currents on Port 5 pins (see
IOV
specification) does not exceed 10 mA.
During the reset calibration sequence the TUE may reach twice the indicated maximum value.
±4
LSB 12-bit conv.6)
Internal resistance of
reference voltage source
RAREF SR –
tBC / 60
- 0.25
k
tBC in [ns]
8)9)
Internal resistance of analog
source
RASRC SR –
tS / 450
- 0.25
k
tS in [ns]
9)10)
ADC input capacitance
CAIN CC –
33
pF
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