參數(shù)資料
型號: SAK-TC1767-256F133HL
廠商: INFINEON TECHNOLOGIES AG
元件分類: 微控制器/微處理器
英文描述: 32-BIT, FLASH, 133 MHz, RISC MICROCONTROLLER, PQFP176
封裝: 0.50 MM PITCH, GREEN, PLASTIC, LQFP-176
文件頁數(shù): 52/126頁
文件大?。?/td> 826K
代理商: SAK-TC1767-256F133HL
TC1767
Introduction
Data Sheet
27
V1.3, 2009-09
For further operating conditions see data sheet section “Flash Memory Parameters”.
Data Flash Features and Functions
64 Kbyte on-chip Flash, configured in two independent Flash banks of equal size.
64 bit read interface.
Erase/program one bank while data read access from the other bank.
Programming one bank while erasing the other bank using an automatic
suspend/resume function.
Dynamic correction of single-bit errors during read access.
Sector architecture:
– Two sectors of equal size.
– Each sector separately erasable.
128 byte pages to be written in one step.
Operational control per command sequences (unlock sequences, same as those of
Program Flash) for protection against unintended operation.
End-of-busy as well as error reporting with interrupt and bus error trap.
Write state machine for automatic program and erase.
Margin check for detection of problematic Flash bits.
Endurance = 30000 (can be device dependent); i.e. 30000 program/erase cycles per
sector are allowed, with a retention of min. 5 years.
Dedicated DFlash status information.
Other characteristics: Same as Program Flash.
2.3.7
Data Access Overlay
The data overlay functionality provides the capability to redirect data accesses by the
TriCore to program memory (segments 8
H and AH) called “target memory” to a different
memory called “overlay memory”.
Depending on the device the following overlay memories can be available:
Overlay SRAM in the PMU.
Emulation Memory
1).
External memory
2).
This functionality makes it possible, for example, to modify the application’s test and
calibration parameters (which are typically stored in the program memory) during run
time of a program.
As the address translation is implemented in the DMI, it affects only data accesses
(reads and writes) of the TriCore. Instruction fetches by the TriCore or accesses by any
other master (including the debug interface) are not redirected.
1) Only available in Emulation Device “ED”.
2) Only available in Emulation Device with EBU.
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