參數(shù)資料
型號: SB-36210IA-361N
廠商: DATA DEVICE CORP
元件分類: 位置變換器
英文描述: SYNCHRO OR RESOLVER TO DIGITAL CONVERTER, DMA34
封裝: MODULE, PACKAGE-34
文件頁數(shù): 5/11頁
文件大?。?/td> 237K
代理商: SB-36210IA-361N
3
Data Device Corporation
www.ddc-web.com
SB-36210IX
J-01/06-0
VALUE
PARAMETER
UNIT
TABLE 1. SB-36210IX SPECIFICATIONS (PER CHANNEL)
These specifications apply over the rated power supply, temperature, and reference frequency ranges; 10%
signal amplitude variation and 10% harmonic distortion. Refer to the RD-19230 data sheet (available at www.ddc-web.com)
for specific converter specifications.
RESOLUTION
ACCURACY (NOTE 1, NOTE 7)
-XX1, -XX3
OSCILLATOR
Option P/N
Carrier Frequency
Voltage Range
Drive
SIGNAL INPUT (NOTE 5)
Option P/N
Synchro
Zin line-to-line
Zin each line-to-ground
Resolver
Zin single ended
Zin differential
Common-mode Range
REFERENCE INPUT (NOTE 5)
Option P/N
Carrier Frequency (NOTE 4)
Type
Voltage Range
Input Impedance
single ended
differential
Common-mode Range
DIGITAL OUTPUTS DRIVE CAPABILITY
A, B, Zero Index (ZI) option (-XX0, -XX1)
POWER SUPPLY (NOTE 6)
Voltage
Current
TEMPERATURE RANGE
Operating (XIX-3XXX)
Storage
PHYSICAL CHARACTERISTICS
NOTES:
1. For transformer isolated cards add 1 minute to specified accuracy.
2. || = “in parallel with.”
3. See ordering information for 90 V line-to-line inputs (input types 3, 4, 5, & 6).
4. If the frequency is between 47 and 1 kHz, then there will be ±1 LSB jitter.
5. See TABLE 4 for Isolation Transformer Option specifications.
6. Requires a 5 V PCI card slot, will not operate on a 3.3 V PCI slot.
7. High frequency card with 5 to 15 kHz, available on special request. For input/ref types “0”
2v direct, “2” 11.8v resolver, “9” LVDT. Consult factory for dynamics, lead time, and pricing.
in.
mm.
Full-size PCI format. Double-width card when 90
Vrms/115 Vrms required. (NOTE 3)
12.3 x 4.2 x 0.91
312 x 106.7 x 23.1
°C
0 to +70
-40 to +85
Vdc
mA
+5
775 with oscillator, no load
50 Pf+
Logic 0: TTL load, 1.6 mA at 0.4 V
Logic 1: 10 TTL loads, = 0.4 mA at 2.8 V min.
Logic 0: 100 mV max. driving CMOS
Logic 1: +5 V supply minus 100mV min. driving CMOS
Vrms L-L
Ohms
Vrms L-L
Ohms
V
Hz
Vrms
Ohms
Vpeak
(option 0I)
47 - 7k
differential
2 - 40
100k
50k
50
(option 1I, 2I)
47 - 7k
differential
2 - 40
100k
50k
50
(option 3I, 4I)
47 - 7k
differential
50 - 130
300k
200k
200
(option 0I)
2 direct
10M || 20pF (NOTE 2)
N/A
(option 1I, 2I)
11.8
52k
35k
11.8
70k
140k
30 max.
(option 3I, 4I)
90
195k
130k
Hz
Vrms
mA max.
(option IX)
57 - 7k
0 - 2
0.5
(option IA)
360 - 7k
0 - 26
60
(option IB)
57 - 440
0 - 115
13
Minutes
47 - 1k (NOTE 4)
1k - 5k
5k - 7k
1 + 1 LSB
2 + 1 LSB
Bits
10, 12, 14, or 16 programmable
Input Frequency
Solid State
Transformer Isolated
Solid State
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