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| 型號(hào)： | SC16C2552BIA44,512 |
| 廠商： | NXP Semiconductors |
| 文件頁(yè)數(shù)： | 3/37頁(yè) |
| 文件大小： | 0K |
| 描述： | IC UART DUAL SOT187-2 |
| 標(biāo)準(zhǔn)包裝： | 26 |
| 特點(diǎn)： | 2 通道 |
| 通道數(shù)： | 2，DUART |
| FIFO's： | 16 字節(jié) |
| 電源電壓： | 2.5V，3.3V，5V |
| 帶IrDA 編碼器/解碼器： | 是 |
| 帶故障啟動(dòng)位檢測(cè)功能： | 是 |
| 帶調(diào)制解調(diào)器控制功能： | 是 |
| 帶CMOS： | 是 |
| 安裝類(lèi)型： | 表面貼裝 |
| 封裝/外殼： | 44-LCC（J 形引線(xiàn)） |
| 供應(yīng)商設(shè)備封裝： | 44-PLCC |
| 包裝： | 管件 |
| 其它名稱(chēng)： | 935274408512 SC16C2552BIA44 SC16C2552BIA44-ND |
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SC16C2552B_3
NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 03 — 12 February 2009
11 of 38
NXP Semiconductors
SC16C2552B
5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 16-byte FIFOs
7.
Register descriptions
Table 6 details the assigned bit functions for the SC16C2552B internal registers. The
assigned bit functions are further dened in Section 7.1 through Section 7.11.
[1]
The value shown represents the register’s initialized hexadecimal value; X = not applicable.
[2]
The ‘General register set’ registers are accessible only when CS is a logic 0 and LCR[7] is logic 0.
[3]
The Baud rate register and AFR register sets are accessible only when CS is a logic 0 and LCR[7] is a logic 1.
Set A is accessible when CHSEL is a logic 1, and Set B is accessible when CHSEL is a logic 0.
Table 6.
SC16C2552B internal registers
A2
A1
A0
Register Default[1]
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
General register set[2]
0
RHR
XX
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
0
THR
XX
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
0
1
IER
00
0
modem
status
interrupt
line
status
interrupt
transmit
holding
register
interrupt
receive
holding
register
0
1
0
FCR
00
RCVR
trigger
(MSB)
RCVR
trigger
(LSB)
0
DMA
mode
select
XMIT
FIFO
reset
RCVR
FIFO
reset
FIFOs
enable
0
1
0
ISR
01
FIFOs
enabled
FIFOs
enabled
0
INT
priority
bit 2
INT
priority
bit 1
INT
priority
bit 0
INT
status
0
1
LCR
00
divisor
latch
enable
set break set parity even
parity
enable
stop bits
word
length
bit 1
word
length
bit 0
1
0
MCR
00
0
loopback OP2
output
control
OP1
RTS
DTR
1
0
1
LSR
60
FIFO
data
error
THR and
TSR
empty
THR
empty
break
interrupt
framing
error
parity
error
overrun
error
receive
data
ready
1
0
MSR
X0
CD
RI
DSR
CTS
CD
RI
DSR
CTS
1
SPR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Special register set[3]
0
DLL
XX
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
0
1
DLM
XX
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9
bit 8
0
1
0
AFR
00
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SC16C2552BIA44-T | 功能描述:UART 接口集成電路 16CB 2.5V-5V 2CH UART 16B FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| SC16C2552CIA44,512 | 制造商:NXP Semiconductors 功能描述: 制造商:NXP Semiconductors 功能描述:SC16C2552CIA44/PLCC44/TUBEDP// - Rail/Tube |
| SC16C2552CIA44,518 | 制造商:NXP Semiconductors 功能描述:SC16C2552CIA44/PLCC44/REEL13DP// - Tape and Reel |
| SC16C2552CIA44,529 | 制造商:NXP Semiconductors 功能描述:SC16C2552CIA44/PLCC44/TUBESMDP// - Rail/Tube |
| SC16C2552IA44 | 制造商:PHILIPS 制造商全稱(chēng):NXP Semiconductors 功能描述:Dual UART with 16-byte transmit and receive FIFOs |
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