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參數(shù)資料
| 型號(hào)： | SC16C2552BIA44,529 |
| 廠商： | NXP Semiconductors |
| 文件頁(yè)數(shù)： | 23/37頁(yè) |
| 文件大小： | 0K |
| 描述： | IC UART DUAL W/FIFO 44-PLCC |
| 產(chǎn)品培訓(xùn)模塊： | Stand-Alone UARTs |
| 標(biāo)準(zhǔn)包裝： | 26 |
| 特點(diǎn)： | 2 通道 |
| 通道數(shù)： | 2，DUART |
| FIFO's： | 16 字節(jié) |
| 電源電壓： | 2.5V，3.3V，5V |
| 帶IrDA 編碼器/解碼器： | 是 |
| 帶故障啟動(dòng)位檢測(cè)功能： | 是 |
| 帶調(diào)制解調(diào)器控制功能： | 是 |
| 帶CMOS： | 是 |
| 安裝類(lèi)型： | 表面貼裝 |
| 封裝/外殼： | 44-LCC（J 形引線） |
| 供應(yīng)商設(shè)備封裝： | 44-PLCC |
| 包裝： | 管件 |
| 產(chǎn)品目錄頁(yè)面： | 828 (CN2011-ZH PDF) |
| 其它名稱(chēng)： | 568-3646-5 935274408529 SC16C2552BIA44-S |
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SC16C2552B_3
NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 03 — 12 February 2009
3 of 38
NXP Semiconductors
SC16C2552B
5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 16-byte FIFOs
5.
Pinning information
5.1 Pinning
5.2 Pin description
Fig 2.
Pin conguration for PLCC44
D5
D6
D7
A0
XTAL1
SC16C2552BIA44
RXA
TXA
DTRA
RTSA
MFA
GND
INTA
XTAL2
VCC
A1
TXRDYB
A2
RIB
CHSEL
CDB
INTB
DSRB
CS
D4
MFB
D3
IOW
D2
RESET
D1
GND
D0
RTSB
TXRDYA
IOR
V
CC
RXB
RIA
TXB
CDA
DTRB
DSRA
CTSB
CTSA
002aaa488
7
8
9
10
11
12
13
14
15
16
17
39
38
37
36
35
34
33
32
31
30
29
18
19
20
21
22
23
24
25
26
27
28
6
5
4
3
2
1
44
43
42
41
40
Table 2.
Pin description
Symbol
Pin
Type
Description
A0
10
I
Register select. A0 to A2 are used during read and write operations to select the UART
register to read from or write to.
A1
14
I
A2
15
I
CDA42
I
Carrier detect A, B (active LOW). These inputs are associated with individual UART
channels A through B. A logic 0 on this pin indicates that a carrier has been detected by the
modem for that channel.
CDB
30
I
CHSEL
16
I
Channel select. UART channel A or B is selected by the logic state of this pin when CS is a
logic 0. A logic 0 on CHSEL selects the UART channel B, while a logic 1 selects UART
channel A. Bit 0 of AFR register can temporarily override CHSEL function, allowing user to
write to both channel registers simultaneously with one write cycle.
CTSA
40
I
Clear to Send A, B (active LOW). These inputs are associated with individual UART
channels A through B. A logic 0 on the CTSn pin indicates the modem or data set is ready to
accept transmit data from the SC16C2552B. Status can be tested by reading MSR[4].
CTSB
28
I
CS
18
I
Chip select (active LOW). This function selects channel A or channel B in accordance with
the logical state of the CHSEL pin. This allows data to be transferred between the user CPU
and the SC16C2552B.
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相關(guān)代理商/技術(shù)參數(shù) |
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| SC16C2552BIA44-T | 功能描述:UART 接口集成電路 16CB 2.5V-5V 2CH UART 16B FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| SC16C2552CIA44,512 | 制造商:NXP Semiconductors 功能描述: 制造商:NXP Semiconductors 功能描述:SC16C2552CIA44/PLCC44/TUBEDP// - Rail/Tube |
| SC16C2552CIA44,518 | 制造商:NXP Semiconductors 功能描述:SC16C2552CIA44/PLCC44/REEL13DP// - Tape and Reel |
| SC16C2552CIA44,529 | 制造商:NXP Semiconductors 功能描述:SC16C2552CIA44/PLCC44/TUBESMDP// - Rail/Tube |
| SC16C2552IA44 | 制造商:PHILIPS 制造商全稱(chēng):NXP Semiconductors 功能描述:Dual UART with 16-byte transmit and receive FIFOs |
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