參數(shù)資料
型號: SC16C652BIBS,151
廠商: NXP Semiconductors
文件頁數(shù): 3/21頁
文件大?。?/td> 0K
描述: IC ENCODER/DECODER IRDA 32HVQFN
標準包裝: 490
特點: 2 通道
通道數(shù): 2,DUART
FIFO's: 32 字節(jié)
電源電壓: 2.5V,3.3V,5V
帶自動流量控制功能:
帶IrDA 編碼器/解碼器:
帶故障啟動位檢測功能:
帶調(diào)制解調(diào)器控制功能:
帶CMOS:
安裝類型: 表面貼裝
封裝/外殼: 32-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 32-HVQFN(5x5)
包裝: 托盤
其它名稱: 935276387151
SC16C652BIBS-S
SC16C652BIBS-S-ND
SC16C652B_4
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 04 — 1 September 2005
11 of 43
Philips Semiconductors
SC16C652B
Dual UART with 32-byte FIFOs and IrDA encoder/decoder
Time Out will not occur if the receive FIFO is empty. The time-out counter is reset at the
center of each stop bit received or each time the Receive Holding Register (RHR) is read.
The actual time-out value is 4 character time, including data information length, start bit,
parity bit, and the size of stop bit, that is, 1
×, 1.5×, or 2× bit times.
6.8 Programmable baud rate generator
The SC16C652B supports high speed modem technologies that have increased input
data rates by employing data compression schemes. For example, a 33.6 kbit/s modem
that employs data compression may require a 115.2 kbit/s input data rate. A 128.0 kbit/s
ISDN modem that supports data compression may need an input data rate of 460.8 kbit/s.
The SC16C652B can support a standard data rate of 921.6 kbit/s.
A single baud rate generator is provided for the transmitter and receiver, allowing
independent TX/RX channel control. The programmable Baud Rate Generator is capable
of operating with a frequency of up to 80 MHz. To obtain maximum data rate, it is
necessary to use full rail swing on the clock input. The SC16C652B can be congured for
internal or external clock operation. For internal clock oscillator operation, an industry
standard microprocessor crystal is connected externally between the XTAL1 and XTAL2
pins. Alternatively, an external clock can be connected to the XTAL1 pin to clock the
internal baud rate generator for standard or custom rates (see Table 6).
The generator divides the input 16
× clock by any divisor from 1 to (216 1). The
SC16C652B divides the basic external clock by 16. The basic 16
× clock provides table
rates to support standard and custom applications using the same system design. The
rate table is congured via the DLL and DLM internal register functions. Customized baud
rates can be achieved by selecting the proper divisor values for the MSB and LSB
sections of baud rate generator.
Programming the baud rate generator registers DLM (MSB) and DLL (LSB) provides a
user capability for selecting the desired nal baud rate. The example in Table 6 shows the
selectable baud rate table available when using a 1.8432 MHz external clock input.
Fig 4.
Crystal oscillator connection
002aaa870
C2
47 pF
XTAL1
XTAL2
X1
1.8432 MHz
C1
22 pF
C2
33 pF
XTAL1
XTAL2
1.5 k
X1
1.8432 MHz
C1
22 pF
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