First Analog Comparator conversion may be delaye" />
參數(shù)資料
型號: SC16C652BIBS,151
廠商: NXP Semiconductors
文件頁數(shù): 8/21頁
文件大小: 0K
描述: IC ENCODER/DECODER IRDA 32HVQFN
標(biāo)準(zhǔn)包裝: 490
特點: 2 通道
通道數(shù): 2,DUART
FIFO's: 32 字節(jié)
電源電壓: 2.5V,3.3V,5V
帶自動流量控制功能:
帶IrDA 編碼器/解碼器:
帶故障啟動位檢測功能:
帶調(diào)制解調(diào)器控制功能:
帶CMOS:
安裝類型: 表面貼裝
封裝/外殼: 32-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 32-HVQFN(5x5)
包裝: 托盤
其它名稱: 935276387151
SC16C652BIBS-S
SC16C652BIBS-S-ND
16
2503QS–AVR–02/11
ATmega32(L)
Errata
ATmega32, rev. A
to F
First Analog Comparator conversion may be delayed
Interrupts may be lost when writing the timer registers in the asynchronous timer
IDCODE masks data from TDI input
Reading EEPROM by using ST or STS to set EERE bit triggers unexpected interrupt request.
1.
First Analog Comparator conversion may be delayed
If the device is powered by a slow rising V
CC, the first Analog Comparator conversion will
take longer than expected on some devices.
Problem Fix/Workaround
When the device has been powered or reset, disable then enable theAnalog Comparator
before the first conversion.
2.
Interrupts may be lost when writing the timer registers in the asynchronous timer
The interrupt will be lost if a timer register that is synchronous timer clock is written when the
asynchronous Timer/Counter register (TCNTx) is 0x00.
Problem Fix/Workaround
Always check that the asynchronous Timer/Counter register neither have the value 0xFF nor
0x00 before writing to the asynchronous Timer Control Register (TCCRx), asynchronous-
Timer Counter Register (TCNTx), or asynchronous Output Compare Register (OCRx).
3.
IDCODE masks data from TDI input
The JTAG instruction IDCODE is not working correctly. Data to succeeding devices are
replaced by all-ones during Update-DR.
Problem Fix / Workaround
If ATmega32 is the only device in the scan chain, the problem is not visible.
Select the Device ID Register of the ATmega32 by issuing the IDCODE instruction or
by entering the Test-Logic-Reset state of the TAP controller to read out the contents
of its Device ID Register and possibly data from succeeding devices of the scan
chain. Issue the BYPASS instruction to the ATmega32 while reading the Device ID
Registers of preceding devices of the boundary scan chain.
If the Device IDs of all devices in the boundary scan chain must be captured
simultaneously, the ATmega32 must be the fist device in the chain.
4.
Reading EEPROM by using ST or STS to set EERE bit triggers unexpected interrupt
request.
Reading EEPROM by using the ST or STS command to set the EERE bit in the EECR reg-
ister triggers an unexpected EEPROM interrupt request.
Problem Fix / Workaround
Always use OUT or SBI to set EERE in EECR.
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