參數(shù)資料
型號: SC16C752IB48,151
廠商: NXP Semiconductors
文件頁數(shù): 5/47頁
文件大小: 0K
描述: IC UART DUAL W/FIFO 48-LQFP
標準包裝: 250
通道數(shù): 2,DUART
FIFO's: 64 字節(jié)
電源電壓: 2.5V,3.3V,5V
帶自動流量控制功能:
帶故障啟動位檢測功能:
帶調制解調器控制功能:
安裝類型: 表面貼裝
封裝/外殼: 48-LQFP
供應商設備封裝: 48-LQFP(7x7)
包裝: 托盤
其它名稱: 568-3289
935270055151
SC16C752IB48-S
Philips Semiconductors
SC16C752
Dual UART with 64-byte FIFO
Product data
Rev. 04 — 20 June 2003
13 of 47
9397 750 11635
Koninklijke Philips Electronics N.V. 2003. All rights reserved.
6.5.1
Interrupt mode operation
In interrupt mode (if any bit of IER[3:0] is 1) the processor is informed of the status of
the receiver and transmitter by an interrupt signal, INT. Therefore, it is not necessary
to continuously poll the line status register (LSR) to see if any interrupt needs to be
serviced. Figure 7 shows interrupt mode operation.
6.5.2
Polled mode operation
In polled mode (IER[3:0] = 0000) the status of the receiver and transmitter can be
checked by polling the line status register (LSR). This mode is an alternative to the
FIFO interrupt mode of operation where the status of the receiver and transmitter is
automatically known by means of interrupts sent to the CPU. Figure 8 shows FIFO
polled mode operation.
Fig 7.
Interrupt mode operation.
11
IIR
IER
THR
RHR
PROCESSOR
IOW / IOR
INT
002aaa230
Fig 8.
FIFO polled mode operation.
00
LSR
IER
THR
RHR
PROCESSOR
IOW / IOR
002aaa231
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