參數(shù)資料
型號: SC16C754BIB80,528
廠商: NXP Semiconductors
文件頁數(shù): 21/50頁
文件大?。?/td> 0K
描述: IC UART QUAD 64BYTE 80LQFP
標(biāo)準(zhǔn)包裝: 1,000
通道數(shù): 4,QUART
FIFO's: 64 字節(jié)
電源電壓: 2.5V,3.3V,5V
帶自動流量控制功能:
帶故障啟動位檢測功能:
帶調(diào)制解調(diào)器控制功能:
安裝類型: 表面貼裝
封裝/外殼: 80-LQFP
供應(yīng)商設(shè)備封裝: 80-LQFP(12x12)
包裝: 帶卷 (TR)
其它名稱: 935274939528
SC16C754BIB80-T
SC16C754BIB80-T-ND
SC16C754B_4
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 04 — 6 October 2008
28 of 51
NXP Semiconductors
SC16C754B
5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with 64-byte FIFOs
7.7 Modem Status Register (MSR)
This 8-bit register provides information about the current state of the control lines from the
modem, data set, or peripheral device to the processor. It also indicates when a control
input from the modem changes state. Table 15 shows modem status register bit settings
per channel.
[1]
The primary inputs RI, CD, CTS, DSR are all active LOW, but their registered equivalents in the MSR and
MCR (in loopback) registers are active HIGH.
Table 15.
Modem status register bits description
Bit
Symbol
Description
7
MSR[7][1]
CD (active HIGH, logic 1). This bit is the complement of the CD input during
normal mode. During internal loopback mode, it is equivalent to MCR[3].
6
MSR[6][1]
RI (active HIGH, logic 1). This bit is the complement of the RI input during
normal mode. During internal loopback mode, it is equivalent to MCR[2].
5
MSR[5][1]
DSR (active HIGH, logic 1). This bit is the complement of the DSR input
during normal mode. During internal loopback mode, it is equivalent MCR[0].
4
MSR[4][1]
CTS (active HIGH, logic 1). This bit is the complement of the CTS input
during normal mode. During internal loopback mode, it is equivalent to
MCR[1].
3
MSR[3]
CD. Indicates that CD input (or MCR[3] in loopback mode) has changed
state. Cleared on a read.
2
MSR[2]
RI. Indicates that RI input (or MCR[2] in loopback mode) has changed state
from LOW to HIGH. Cleared on a read.
1
MSR[1]
DSR. Indicates that DSR input (or MCR[0] in loopback mode) has changed
state. Cleared on a read.
0
MSR[0]
CTS. Indicates that CTS input (or MCR[1] in loopback mode) has changed
state. Cleared on a read.
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