- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄372122 > SC28L194 (NXP Semiconductors N.V.) Quad UART for 3.3V and 5V supply voltage(在3.3V和5V電源電壓中應(yīng)用的四 UART) PDF資料下載
參數(shù)資料
| 型號： | SC28L194 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Quad UART for 3.3V and 5V supply voltage(在3.3V和5V電源電壓中應(yīng)用的四 UART) |
| 中文描述： | 四UART的3.3V和5V電源電壓（在3.3和5V的電源電壓中應(yīng)用的四UART）的 |
| 文件頁數(shù)： | 16/52頁 |
| 文件大?。?/td> | 294K |
| 代理商： | SC28L194 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁當(dāng)前第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁
Philips Semiconductors
Preliminary specification
SC28L194
Quad UART for 3.3V and 5V supply voltage
1998 Sep 21
16
Table 2.
THIS IS A VERY IMPORTANT REGISTER! IT SHOULD BE THE FIRST REGISTER ADDRESSED DURING INITIALIZATION
. This register
has two addresses: x‘0F and x‘8F. The Global Configuration Control Register (GCCR) sets the type of bus cycle, interrupt vector modification
1 - Sync, non-pipe-lined
cycle
Set to 0
GCCR - Global Configuration Control Register
ááááááááááááááááááááááááááááááá
ááááááááááááááááááááááááááááááá
ááááááááááááááááááááááááááááááá
á
á
ááááááááááááááááááááááááááááááá
not set to zero most internal addressing will be disabled!
á
á
change detection, BRG counter/timers and Address/Xon./Xoff
recognition is disabled.
á
áááá
ááá
á
Must be set to 0
á
á
á
á
áááááá
áááááá
á
á
GCCR(6):
Bus cycle selection
Controls the operation of the host interface logic. If reset, the power
on/reset default, the host interface can accommodate arbitrarily long
bus I/O cycles. If the bit is set, the Quad UART expects four Sclk
cycle bus I/O operations similar to those produced by an i80386
processor in non-pipelined mode. The major differences in these
modes are observed in the DACKN pin function. In Sync mode, no
negation of CEN is required between cycles.
GCCR(2:1):
Interrupt vector configuration
The IVC field controls if and how the assertion of IACKN (the
interrupt acknowledge pin) will form the interrupt vector for the Quad
UART. If b’00, no vector will be presented during an IACKN cycle.
The bus will be driven high (xFF). If the field contains a b’01, the
contents of the IVR, Interrupt Vector Register, will be presented as
the interrupt vector without modification. If IVC = b’10, the channel
code will replace the 3 LSBs of the IVR; if IVC = b’11 then a modified
interrupt type and channel code replace the 5 LSBs of the IVR.
Note: The modified type field IVR(4:3) is:
10
Receiver w/o error
11
Receiver with error
01
Transmitter
00
All remaining sources
GCCR(0):
Power down control
Controls the power down function. During power down the internal
oscillator is disabled, interrupt arbitration and all data
Note: For maximum power savings it is recommended that all
switching inputs be stopped and all input voltage levels be within 0.5
volt of the Vcc and Vss power supply levels.
To switch from the asynchronous to the synchronous bus cycle
mode, a single write operation to the GCCR, terminated by a
negation of the CEN pin, is required. This cycle may be 4 cycles
long if the setup time of the CEN edge to Sclk can be guaranteed.
The host CPU must ensure that a minimum of two Sclk cycles
elapse before the initiation of the next (synchronous) bus cycle(s).
A hardware or software reset is recommended for the unlikely
requirement of returning to the asynchronous bus cycling mode.
MR - Mode Registers
The user must exercise caution when changing the mode of running
receivers, transmitters or BRG counter/timers. The selected mode
will be activated immediately upon selection, even if this occurs
during the reception or transmission of a character. It is also
possible to disrupt internal controllers by changing modes at critical
times, thus rendering later transmission or reception faulty or
impossible. An exception to this policy is switching from auto-echo
or remote loop back modes to normal mode. If the deselection
occurs just after the receiver has sampled the stop bit (in most
cases indicated by the assertion of the channel’s RxRDY bit) and
the transmitter is enabled, the transmitter will remain in auto-echo
mode until the end of the transmission of the stop bit.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SC28L198 | Octal UART for 3.3V and 5V supply voltage |
| SC28L198A1 | Octal UART for 3.3V and 5V supply voltage |
| SC28L198C1A | Cable Ties; Color:Black; Pack Quantity:100 |
| SC28C198A1A | Octal UART for 3.3V and 5V supply voltage |
| SC28L202A1 | Dual universal asynchronous receiver/transmitter DUART |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SC28L194A1A | 功能描述:UART 接口集成電路 3V-5V 4CH UART INTEL/MOT INTRF RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| SC28L194A1A,512 | 功能描述:UART 接口集成電路 3V-5V 4CH UART RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| SC28L194A1A,518 | 功能描述:UART 接口集成電路 3V-5V 4CH UART RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| SC28L194A1A,529 | 功能描述:UART 接口集成電路 3V-5V 4CH UART RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| SC28L194A1A-S | 功能描述:UART 接口集成電路 3V-5V 4CH UART INTEL/MOT INTRF RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。