SCF5250 Data Sheet: Technical Data, Rev. 1.3 18 Freescale" />
參數(shù)資料
型號: SCF5250VM120
廠商: Freescale Semiconductor
文件頁數(shù): 10/56頁
文件大小: 0K
描述: MCU 32BIT 120MHZ AUD 196-MAPBGA
產(chǎn)品變化通告: Product Discontinuation 24/Feb/2012
標(biāo)準(zhǔn)包裝: 126
系列: SCF52xx
核心處理器: Coldfire V2
芯體尺寸: 32-位
速度: 120MHz
連通性: EBI/EMI,I²C,IDE,MMC,SPI,UART/USART
外圍設(shè)備: DMA,I²S,POR,串行音頻,WDT
輸入/輸出數(shù): 57
程序存儲器類型: ROMless
RAM 容量: 128K x 8
電壓 - 電源 (Vcc/Vdd): 1.08 V ~ 1.32 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 6x12b
振蕩器型: 內(nèi)部
工作溫度: -20°C ~ 70°C
封裝/外殼: 196-LBGA
包裝: 托盤
SCF5250 Data Sheet: Technical Data, Rev. 1.3
18
Freescale Semiconductor
3.15
Queued Serial Peripheral Interface (QSPI)
The QSPI interface is a high-speed serial interface allowing transmit and receive of serial data. Pin
descriptions are given in Table 11.
3.16
Crystal Trim
The XTRIM/GPIO0 output produces a pulse-density modulated phase/frequency difference signal to be
used after low-pass filtering to control varicap-voltage to control crystal oscillation frequency. This will
lock the crystal to the incoming digital audio signal.
3.17
Clock Out
The MCLK1/GPIO11 and QSPI_CS2/MCLK2/GPIO24 can serve as DAC clock outputs. When
programmed as DAC clock outputs, these signals are directly derived from the crystal oscillator or clock
Input (CRIN).
DDATAO/CTS1/SDATA0_SDIO1/GPIO1 Secure Digital serial data bit 0
Memory Stick interface 1 data I/O
SCL0/SDATA1_BS1/GPIO41
Secure Digital serial data bit 1
Memory Stick interface 1 strobe
DDATA1/RTS1/SDATA2_BS2/GPIO2
Secure Digital serial data bit 2
Memory Stick interface 2 strobe
Reset output signal
Selection between Reset function and SDATA2_BS2 is done by programming PLLCR
register.
SDA0/SDATA3/GPIO42
Secure Digital serial data bit 3
Table 11. Queued Serial Peripheral Interface (QSPI) Signals
Serial Module Signal
Description
QSPICLK/SUBR/GPIO25
Multiplexed signal IIC interface clock or QSPI clock output Function select is done via
PLLCR register.
RCK/QSPIDIN/QSPI_DOUT/GPIO26
Multiplexed signal IIC interface data or QSPI data input. Function select is done via
PLLCR register.
RCK/QSPI_DIN/QSPI_DOUT/GPIO26
QSPI_DOUT/SFSY/GPIO27
QSPI data output.
QSPICS0/EBUIN4GPIO15
4 different QSPI chip selects.
QSPICS1/EBUOUT2/GPIO16
QSPICS2/MCLK2/GPIO24
CS1/QSPICS3/GPIO28
Table 10. Flash Memory Card Signals (continued)
Flash Memory Signal
Description
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