參數(shù)資料
型號(hào): SCN26562C4A52
廠商: NXP SEMICONDUCTORS
元件分類(lèi): 微控制器/微處理器
英文描述: Dual universal serial communications controller DUSCC
中文描述: 2 CHANNEL(S), 4M bps, MULTI PROTOCOL CONTROLLER, PQCC52
封裝: PLASTIC, LCC-52
文件頁(yè)數(shù): 7/17頁(yè)
文件大?。?/td> 101K
代理商: SCN26562C4A52
Philips Semiconductors
Product specification
SCN26562
Dual universal serial communications controller (DUSCC)
1995 May 1
7
AC ELECTRICAL CHARACTERISTICS
(Continued)
A6–A1
t
ADVRDL
CEN
t
CEHCEL
t
CELRDL
RDN
t
RDHCEH
t
RDLADI
t
RDLRDH
t
RDHRDL
D0–D7
t
RDLDDV
t
RDHDDF
t
RDHDDI
RDYN
t
RDLRYL
t
RYZDDV
1
NOTES:
1.
2.
Wait on Rx. Receiver FIFO empty.
Timing is illustrated and referenced to the WRN and RDN inputs. The device may also be operated with CEN as the ‘strobing’ input. CEN and RDN
(also CEN and WRN) are ANDed internally. As a consequence, the signal asserted last initiates the cycle and the signal negated first terminates the
cycle.
SD00206
Figure 4. Read Cycle
SYMBOL
PARAMETER
LIMITS
UNIT
SCN26562C4
Min
SCN26562C2
Min
Max
Max
t
ADVRDL
t
CELRDL
t
RDLADI
t
RDLRYL
t
RDLDDV
t
RDLRDH
t
RYZDDV
t
RDHCEH
t
CEHCEL
t
RDHDDI
t
RDHRDL
t
RDHDDF
Address valid to RDN low
CEN low to RDN low
RDN low to address invalid
RDN low to RDYN low
RDN low to read data valid
RDN low to RDN high
RDYN high impedance to read data valid
RDN high to CEN high
CEN high to CEN low
RDN high to read data invalid
RDN high to RDN low
RDN high to data bus floating
10
0
150
300
0
160
10
160
275
280
100
75
10
0
150
310
0
170
10
170
275
300
100
75
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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