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參數(shù)資料
| 型號： | SCN68652AC2A44 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | Multi-protocol communications controller MPCC |
| 中文描述： | 1 CHANNEL(S), 2M bps, MULTI PROTOCOL CONTROLLER, PQCC44 |
| 封裝： | PLASTIC, LCC-44 |
| 文件頁數(shù)： | 13/28頁 |
| 文件大?。?/td> | 651K |
| 代理商： | SCN68652AC2A44 |
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Philips Semiconductors
Product specification
SCN2652/SCN68652
Multi-protocol communications controller (MPCC)
1995 May 01
13
Table 4. MPCC Register Addressing
A2
Byte = 0 (16-Bit Data Bus = DB
15
– DB
00
)
0
0
1
1
Byte = 1 (8-Bit Data Bus = DB
7–0
or DB
15–8
**)
0
0
0
0
1
1
1
1
NOTES:
* PCR lower byte does not exist. It will be all “0”s when read.
** Corresponding high and low order pins must be tied together.
A1
A0
REGISTER
0
1
0
1
X
X
X
X
RDSR
TDSR
PCSAR
PCR*
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
RDSR
L
RDSR
H
TDSR
L
TDSR
H
PCSAR
L
PCSAR
H
PCR
L
*
PCR
H
Table 5. Parameter Control Register (PCR)–(R/W)
BIT
NAME
00–07
Not Defined
08–10
RxCL
BOP/BCP
MODE
FUNCTION
Receiver character length is loaded by the processor when RxCLE = 0. The character length is
valid after transmission of single byte address and control fields have been received.
10
0
0
0
0
1
1
1
1
9
0
0
1
1
0
0
1
1
8
0
1
0
1
0
1
0
1
Char length (bits)
8
1
2
3
4
5
6
7
11
RxCLE
BOP/BCP
Receiver character length enable should be zero when the processor loads RxCL. The
remaining bits of PCR are not affected during loading. Always 0 when read.
Transmitter character length enable should be zero when the processor loads TxCL. The
remaining bits of PCR are not affected during loading. Always 0 when read.
Transmitter character length is loaded by the processor when TxCLe = 0. Character bit length
specification format is identical to RxCL. It is valid after transmission of single byte address and
control fields.
12
TxCLE
BOP/BCP
13–15
TxCL
BOP/BCP
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