參數(shù)資料
型號: SE370C777Ayyz
廠商: Texas Instruments, Inc.
英文描述: TMS370 MICROCONTROLLER FAMILY DATA BOOK
中文描述: TMS370微控制器系列數(shù)據(jù)手冊
文件頁數(shù): 45/78頁
文件大?。?/td> 919K
代理商: SE370C777AYYZ
GLOSSARY/SYMBOLS, TERMS, AND DEFINITIONS
1–37
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
W
WAIT pin:
pansion bus) for an indefinite number of clock cycles (one or more extra clockout cycles). When the wait line is
released, the processor resynchronizes with the rising edge of the clockout signal (CLKOUT) after EDS goes ac-
tive and continues with the program.
The pin that allows an external device to cause the processor to wait (holding the information on the ex-
wait states, automatic:
date peripherals or expansion memory with slower access time than the TMS370 processor. These wait states
are governed by two control bits: PF AUTOWAIT (SCCR0.5) and AUTOWAIT DISABLE (SCCR1.4).
Extra clock cycles inserted automatically on every external-memory access to accommo-
watchdog (WD) timer:
tion serves as a hardware monitor over the software to prevent a “l(fā)ost” program and is available in both the
timer 1 and PACT modules. If timer 1 does not need a watchdog, this timer can be used as a general-purpose
timer.
A timer option that can be programmed to generate an interrupt when it times out. This func-
write:
A memory operation whereby data is written into a desired address location
Write Enable:
it to assume the read mode
A control signal that when true causes the memory to assume the write mode, and when false causes
write-protect override (WPO):
WPO mode is entered when external circuitry applies 12 V to the MC pin after the device has been reset into one
of its normal operating modes.
The only mode in which a TMS370 device can modify the on-board EEPROM. The
X
XDS/22:
processor that is on the target system
A code-development tool that is external to the target system and provides direct control over the TMS370
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