參數(shù)資料
型號: SI2404-D-GT
廠商: Silicon Laboratories Inc
文件頁數(shù): 42/60頁
文件大?。?/td> 0K
描述: IC ISOMODEM GLOBAL DAA 24TSSOP
標準包裝: 62
系列: *
Si2457/34/15/04
Rev. 1.3
47
8. Pin Descriptions: Si2457/34/15/04 (24-Pin Option)
Pin #
Pin Name
Description
1CLKIN/XTALI
Clock Input/Crystal Oscillator Pin.
Provides support for parallel resonant AT cut crystals. A 4.9152 MHz or
32.768 kHz crystal or a 32.768 kHz or 4.9152 or 27 MHz clock on XTALI is
required.
2XTALO
Crystal Oscillator Pin.
Serves as the output of the crystal amplifier.
3
CLKOUT/EECS/
A0
Clock Output/EEPROM Chip Select/Address Bit 0.
Clock output in serial mode. Active low read/write enable for SPI EEPROM in
serial mode when pin 4 is pulled low during powerup. Address Enable in parallel
mode.
4
FSYNC/D6
Frame Sync/Data Bit.
Frame Sync output to codec in serial mode. Bidirectional parallel bus data bit 6 in
parallel mode.
5, 21
VD3.3
Digital Supply Voltage.
Provides the 3.3 V supply voltage to the Si2457/34/15/04.
6, 20
GND
Ground.
Connects to the system digital ground.
7,19
VDA, VDB
Regulator Voltage Reference.
Connects to an external capacitor and serves as the reference for the internal
voltage regulator.
8SS/RTS/D7
SPI Slave Select/Request to Send/Data Bit.
Active low slave select in SPI mode.
Active low request to send input used for flow control in UART mode. Bidirec-
tional parallel bus data bit 7 in parallel mode.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
Si2457/34/15/04
(24-Pin Option)
CLKIN/XTALI
XTALO
CLKOUT/EECS/A0
FSYNC/D6
VD3.3
GND
VDA
SS/RTS/D7
MISO/RXD/RD
MOSI/TXD/WR
SCLK/CTS/CS
RESET
AOUT/INT
RI/D1
SDI/EESD/D2
VDB
VD3.3
ESC/D3
DCD/D4
GND
SDO/EECLK/D5
INT/DO
C1A
C2A
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