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參數(shù)資料
型號(hào)： SI2415-D-GT
廠商： Silicon Laboratories Inc
文件頁(yè)數(shù)： 58/60頁(yè)
文件大小： 0K
描述： IC ISOMODEM GLOBAL DAA 24TSSOP
標(biāo)準(zhǔn)包裝： 62
系列： *
Si2457/34/15/04
Rev. 1.3
7
Table 5. Absolute Maximum Ratings
Parameter
Symbol
Value
Unit
DC Supply Voltage
VD
4.1
V
Input Current, Si2457/34/15/04 Digital
Input Pins
IIN
±10
mA
Digital Input Voltage
VIND
–0.3 to (VD + 0.3)
V
CLKIN/XTALI Input Voltage
VXIND
–0.3 to (VD + 0.3)
V
Operating Temperature Range
TA
–10 to 100
°C
Storage Temperature Range
TSTG
–40 to 150
°C
Note: Permanent device damage may occur if the above absolute maximum ratings are exceeded. Functional operation
should be restricted to the conditions as specified in the operational sections of this data sheet. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Table 6. Switching Characteristics1
(VD = 3.0 to 3.6 V, TA = 0 to 70 °C for F-grade, TA = –40 to 85 °C for G-grade)
Parameter
Symbol
Min
Typ
Max
Unit
UART Timing Parameters
Baud Rate Accuracy
tBD
–1
—
1
%
Reset Timing Parameters
RESET
to RESET
tRS
5.02
——
ms
RESET
to 1st AT Command
tAT
300
—
ms
Parallel Timing Parameters
Address Setup
tAS
15
—
ns
Address Hold
tAH
0—
—
ns
WR Low Pulse Width
tWL
50
—
ns
Write Data Setup Time
tWDSU
20
—
ns
Write Cycle Time
tWC
120
—
ns
Chip Select Setup
tCSS
10
—
ns
Chip Select Hold
tCSH
0—
—
ns
RD Low Pulse Width
tRL
50
—
ns
RD Low to Data Driven Time
tRLDD
—
20
ns
Data Hold
tDH
10
—
ns
RD High to Hi-Z Time
tDZ
—
30
ns
Notes:
1. All timing is referenced to the 50% level of the waveform. Input test levels are VIH =VD – 0.4 V, VIL =0.4 V.
2. With 32.768 kHz clocking, allow 500 ms for the reset low-to-high minimum pulse on power-up and wake-from-power-
down conditions.
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