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參數(shù)資料
| 型號： | SI3210M-BT |
| 廠商： | Electronic Theatre Controls, Inc. |
| 元件分類： | Codec |
| 英文描述： | PROSLIC PROGRAMMABLE CMOS SLIC/CODEC WITH RINGING/BATTERY VOLTAGE GENERATION |
| 中文描述： | ProSLIC產(chǎn)品可編程的CMOS用戶接口/有振鈴編解碼器/電池電壓生成 |
| 文件頁數(shù)： | 28/122頁 |
| 文件大?。?/td> | 1950K |
| 代理商： | SI3210M-BT |
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Si3210/Si3211/Si3212
28
Preliminary Rev. 1.11
and average input currents can become large with small
input voltages. Consider this when selecting the
appropriate input voltage and power rating for the V
DC
power supply (number of REN supported).
For this solution, an n-channel power MOSFET (M1)
switches the current flow through a power transformer
T1. T1 is specified in Application Note 45 (AN45), and
includes several taps on the primary side to facilitate a
wide range of input voltages. The Si3210M version of
the Si3210 must be used for the application circuit
depicted in Figure 9 because the DCFF pin is used to
drive M1 directly and therefore must be the same
polarity as DCDRV. DCDRV is not used in this circuit
option; connecting DCFF and DCDRV together is not
recommended.
DC-DC Converter Architecture
(Si3210/Si3210M Only)
The control logic for a pulse width modulated (PWM) dc-
dc converter is incorporated in the Si3210. Output pins,
DCDRV and DCFF, are used to switch a bipolar
transistor or MOSFET. The polarity of DCFF is opposite
to that of DCDRV.
The dc-dc converter circuit is powered on when the
DCOF bit in the Power Down Register (direct
Register 14, bit 4) is cleared to 0.
The switching
regulator circuit within the Si3210 is a high
performance, pulse-width modulation controller. The
control pins are driven by the PWM controller logic in
the Si3210. The regulated output voltage (V
BAT
) is
sensed by the SVBAT pin and is used to detect whether
the output voltage is above or below an internal
reference for the desired battery voltage. The dc
monitor pins SDCH and SDCL monitor input current and
voltage to the dc-dc converter external circuitry. If an
overload condition is detected, the PWM controller will
turn off the switching transistor for the remainder of a
PWM
period
to
prevent
components. It is important that the proper value of R18
be selected to ensure safe operation. Guidance is given
in Application Note 45 (AN45).
The PWM controller operates at a frequency set by the
dc-dc Converter PWM register (direct Register 92).
During a PWM period the outputs of the control pins
DCDRV and DCFF are asserted for a time given by the
read-only
PWM
Pulse
Register 94).
The dc-dc converter must be off for some time in each
cycle to allow the inductor or transformer to transfer its
stored energy to the output capacitor, C9. This minimum
off time can be set through the dc-dc Converter
Switching Delay register, (direct Register 93). The
number of 16.384 MHz clock cycles that the controller is
off is equal to DCTOF (bits 0 through 4) plus 4. If the dc
damage
to
external
Width
register
(direct
Monitor pins detect an overload condition, the dc-dc
converter interrupts its conversion cycles regardless of
the register settings to prevent component damage.
These inputs should be calibrated by writing the DCCAL
bit (bit 7) of the dc-dc Converter Switching Delay
register, direct Register 93, after the dc-dc converter
has been turned on.
Because the Si3210 dynamically regulates its own
battery supply voltage using the dc-dc converter
controller, the battery voltage (V
BAT
) is offset from the
negative-most terminal by a programmable voltage
(V
OV
) to allow voltage headroom for carrying audio
signals.
As mentioned previously, the Si3210 dynamically
adjusts V
BAT
to suit the particular circuit requirement. To
illustrate this, the behavior of V
BAT
in the active state is
shown in Figure 17. In the active state, the TIP-to-RING
open circuit voltage is kept at V
OC
in the constant
voltage region while the regulator output voltage, V
BAT
=
V
CM
+ V
OC
+ V
OV
.
When the loop current attempts to exceed I
LIM
, the dc
line driver circuit enters constant current mode allowing
the TIP to RING voltage to track R
LOOP
. As the TIP
terminal is kept at a constant voltage, it is the RING
terminal voltage that tracks R
LOOP
and, as a result, the
|V
BAT
| voltage will also track R
LOOP
. In this state, |V
BAT
|
= I
LIM
R
LOOP
+ V
CM
+V
OV
. As R
LOOP
decreases below
the VOC/I
LIM
mark, the regulator output voltage can
continue to track R
LOOP
(TRACK = 1), or the R
LOOP
tracking mechanism is stopped when |V
BAT
| = |V
BATL
|
(TRACK = 0). The former case is the more common
application
and
provides
dissipation savings. In principle, the regulator output
voltage can go as low as |V
BAT
| = V
CM
+ V
OV
, offering
significant power savings.
When TRACK = 0, |V
BAT
| will not decrease below
V
BATL
. The RING terminal voltage, however, continues
to decrease with decreasing R
LOOP
. The power
dissipation on the NPN bipolar transistor driving the
RING terminal can become large and may require a
higher power rating device. The non-tracking mode of
operation is required by specific terminal equipment
which, in order to initiate certain data transmission
modes, goes briefly on-hook to measure the line voltage
to determine whether there is any other off-hook
terminal equipment on the same line. TRACK = 0 mode
is desired since the regulator output voltage has long
settling time constants (on the order of tens of
milliseconds) and cannot change rapidly for TRACK = 1
mode.
Therefore,
the
measurement would yield approximately the same
voltage as the off-hook line voltage and would cause the
terminal equipment to incorrectly sense another off-
hook terminal.
the
maximum
power
brief
on-hook
voltage
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SI3210 | PROSLIC PROGRAMMABLE CMOS SLIC/CODEC WITH RINGING/BATTERY VOLTAGE GENERATION |
| SI3210-BT | PROSLIC PROGRAMMABLE CMOS SLIC/CODEC WITH RINGING/BATTERY VOLTAGE GENERATION |
| SI3210-KT | PROSLIC PROGRAMMABLE CMOS SLIC/CODEC WITH RINGING/BATTERY VOLTAGE GENERATION |
| SI3211-BT | PROSLIC PROGRAMMABLE CMOS SLIC/CODEC WITH RINGING/BATTERY VOLTAGE GENERATION |
| SI3211-KT | PROSLIC PROGRAMMABLE CMOS SLIC/CODEC WITH RINGING/BATTERY VOLTAGE GENERATION |
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