參數(shù)資料
型號： SI3210MPPQX-EVB
廠商： Silicon Laboratories Inc
文件頁數(shù)： 88/148頁
文件大?。?/td> 0K
描述： BOARD EVAL W/DISCRETE INTERFACE
標準包裝： 1
系列： ProSLIC®
主要目的： 接口，模擬前端（AFE）
已用 IC / 零件： Si3210
已供物品： 板，CD
Si3210/Si3211
44
Rev. 1.61
Not
Recommended
fo
r N
ew
D
esi
gn
s
When
the
ringing
state
is
invoked
by
writing
LF[2:0] = 100 (direct Register 64), the ProSLIC will go
into the ringing state and start the first ring. At the
expiration of RAT, the ProSLIC will turn off the ringing
waveform and will go to the on-hook transmission state.
At the expiration of RIT, ringing will again be initiated.
This process will continue as long as the two timers are
enabled and the Linefeed Control register is set to the
ringing state.
2.4.2. Sinusoidal Ringing
To configure the ProSLIC for sinusoidal ringing, the
frequency and amplitude are initialized by writing to the
following indirect registers: RCO, RNGX, and RNGY.
The equations for RCO, RNGX, RNGY are as follows:
where
and f = desired ringing frequency in Hertz.
The minimum allowed peak TIP-to-RING ringing voltage
depends on the linefeed state. In the forward active
linefeed state, the selected ringing amplitude (RNGX,
Indirect Register 21) plus the selected ringing dc voltage
offset (ROFF, Indirect Register 19) must be greater than
the selected on-hook line voltage setting (VOC, direct
Register 72). In the reverse active linefeed state, the
selected ringing amplitude (RNGX, Indirect Register 21)
minus the selected ringing dc voltage offset (ROFF,
Indirect Register 19) must be greater than the selected
on-hook line voltage setting (VOC, direct Register 72).
Using a 70 VPK 20 Hz ringing signal as an example, the
equations are as follows:
Table 30. Registers for Ringing Generation
Parameter
Range/ Description
Register
Bits
Location
Ringing Waveform
Sine/Trapezoid
TSWS
Direct Register 34
Ringing Voltage Offset Enable
Enabled/
Disabled
RVO
Direct Register 34
Ringing Active Timer Enable
Enabled/
Disabled
RTAE
Direct Register 34
Ringing Inactive Timer Enable
Enabled/
Disabled
RTIE
Direct Register 34
Ringing Oscillator Enable
Enabled/
Disabled
ROE
Direct Register 34
Ringing Oscillator Active Timer
0 to 8 seconds
RAT[15:0]
Direct Registers 48 and 49
Ringing Oscillator Inactive Timer
0 to 8 seconds
RIT[15:0]
Direct Registers 50 and 51
Linefeed Control (Initiates Ringing State)
Ringing State = 100b
LF[2:0]
Direct Register 64
High Battery Voltage
0 to –94.5 V
VBATH[5:0]
Direct Register 74
Ringing dc voltage offset
0 to 94.5 V
ROFF[15:0]
Indirect Register 19
Ringing frequency
15 to 100 Hz
RCO[15:0]
Indirect Register 20
Ringing amplitude
0 to 94.5 V
RNGX[15:0]
Indirect Register 21
Ringing initial phase
Sets initial phase for
sinewave and period
for
trapezoid
RNGY[15:0]
Indirect Register 22
Common Mode Bias Adjust During Ringing
0 to 22.5 V
VCMR[3:0]
Indirect Register 40
Note: The ProSLIC uses registers that are both directly and indirectly mapped. A “direct” register is one that is mapped
directly. An “indirect” register is one that is accessed using the indirect access registers (direct registers 28 through
31).
RCO
coeff
2
15
=
coeff
2
f
1000 Hz
-----------------------
cos
=
RNGX
1
4
---
1coeff
–
1
coeff
+
------------------------
2
15
Desired V
PK 0to94.5V
96 V
------------------------------------------------------------------------
=
RNGY
0
=
coeff
2
20
1000 Hz
-----------------------
0.99211
=
cos
=
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