參數(shù)資料
型號(hào)： SI3232-G-GQ
廠商： Silicon Laboratories Inc
文件頁(yè)數(shù)： 84/128頁(yè)
文件大?。?/td> 0K
描述： IC SLIC PROG DUAL-CH 64TQFP
標(biāo)準(zhǔn)包裝： 160
功能： 用戶線路接口概念（SLIC）
接口： ISDN
電路數(shù)： 2
電源電壓： 3.13 V ~ 3.47 V
電流 - 電源： 28mA
功率（瓦特）： 280mW
工作溫度： -40°C ~ 85°C
安裝類(lèi)型： 表面貼裝
封裝/外殼： 64-TQFP
供應(yīng)商設(shè)備封裝： 64-TQFP（10x10）
包裝： 托盤(pán)
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Si3232
Preliminary Rev. 0.96
59
Not
Recommended
fo
r N
ew
D
esi
gn
s
Figure 38. SLIC Diagnostic Filter Structure
The peak detect filter block will report the magnitude of
the largest positive or negative value without sign. The
dc filter block consists of a single pole IIR low-pass filter
with a coefficient held in the DIAGDCCO indirect
register. The filter output can be read from the
DIAG_DC indirect register. The ac filter block consists of
a full-wave rectifier followed by a single-pole IIR low-
pass filter with a coefficient held in the DIAGACCO
indirect register. The peak value can be read from the
DIAGPK
indirect
register.
The
peak
value
is
automatically cleared, and the filters are flushed on the
0-1 transition of the SDIAG bit as well as any time the
input source is changed. The user can always write 0 to
the DIAGPK register to get peak information for a
specific time interval.
4.18.5. Diagnostics Capabilities
Foreign voltages test. The Si3232 can detect the
presence of foreign voltages according to GR-909
requirements of ac voltages > 10 V and dc voltages
> 6 V from T-G or R-G. This test should only be
performed once it has been determined that a
hazardous voltage is not present on the line.
Resistive faults test. Resistive fault conditions can
be measured from T-G, R-G, or T-R for dc resistance
per GR-909 specifications. If the dc resistance is
< 150 k
, it is considered a resistive fault. This test
can be performed by programming the Si3232 to
generate a constant open-circuit voltage and
measuring the resulting current. The resistance can
then be calculated in the system DSP.
Receiver off-hook test. This test can use a similar
procedure as outlined in the Resistive Faults test
above but is measured only across T-R. In addition,
two measurements must be performed at different
open-circuit voltages in order to verify the resistive
linearity. If the calculated resistance has more than
15% nonlinearity between the two calculated points
and the voltage/current origin, it is determined to be
a resistive fault.
Ringers (REN) test. This test verifies the presence
of REN at the end of the TIP/RING pair per GR-909
specifications. It can be implemented by generating
a 20 Hz ringing signal between 7 Vrms and 17 Vrms
and measuring the 20 Hz ac current using the 8-bit
monitor ADC. The resistance (REN) can then be
calculated using the system DSP. The acceptable
REN range is > 0.175 REN (<40 k
) or < 5 REN
(> 1400
). A returned value of <1400 is
determined to be a resistive fault from T-R, and a
returned value > 40 k
is determined to be a loop
with no handset attached.
AC line impedance measurement. This test can
determine the loop length across T-R. It can be
implemented by sending out multiple discrete tones
from the system DSP/codec, one at a time, and
measuring the returned amplitude, with the system
hybrid balance filter disabled. By calculating the
voltage difference between the initial amplitude and
the received amplitude and dividing the result by the
audio current, the line impedance can then be
calculated in the system processor.
Line capacitance measurement. This test can be
implemented in the same manner as the ac line
impedance measurement
test above, but the
frequency band of interest is between 1 kHz and
3.4 kHz. Knowing the synthesized 2-wire impedance
of the Si3232, the roll-off effect can be used to
calculate the ac line capacitance. An external codec
is required for this test.
PEAK
DETECT
LPF
FULL WAVE
RECTIFIER
DIAGDCCO
DIAGACCO
SDIAG_PK
SDIAG_DC
SDIAG_AC
VTIP
VRING
VLOOP
VLONG
ILOOP
ILONG
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