參數(shù)資料
型號: SI5013-EVB
廠商: Silicon Laboratories Inc
文件頁數(shù): 13/26頁
文件大?。?/td> 0K
描述: BOARD EVALUATION FOR SI5013
標(biāo)準(zhǔn)包裝: 1
主要目的: 計(jì)時(shí),時(shí)鐘和數(shù)據(jù)恢復(fù)(CDR)
已用 IC / 零件: SI5013
已供物品:
其它名稱: 336-1123
Si5013
20
Rev. 1.6
5
6
REFCLK+
REFCLK–
ISee Table 2
Differential Reference Clock (Optional).
When present, the reference clock sets the center
operating frequency of the DSPLL for clock and
data recovery. Tie REFCLK+ to VDD and REFCLK–
to GND to operate without an external reference
clock.
See Table 7 on page 12 for typical reference clock
frequencies.
7
LOL
OLVTTL
Loss-of-Lock.
This output is driven low when the recovered clock
frequency deviates from the reference clock by the
amount specified in Table 4 on page 9. If no exter-
nal reference is supplied, this signal will be active
when the internal PLL is no longer locked to the
incoming data.
8
LTR
ILVTTL
Lock-to-Reference.
When this pin is low, the DSPLL disregards the data
inputs. If an external reference is supplied, the out-
put clock locks to the supplied reference. If no
external reference is used, the DSPLL locks the
control loop until LTR is released.
Note: This input has a weak internal pullup.
9
LOS
OLVTTL
Loss-of-Signal.
This output pin is driven low when the input signal is
below the threshold set via LOS_LVL. (LOS opera-
tion is guaranteed only when ac coupling is used on
the DIN inputs.)
10
DSQLCH
LVTTL
Data Squelch.
When driven high, this pin forces the data present
on DOUT+ to zero and DOUT– to one. For normal
operation, this pin should be low. DSQLCH may be
used during LOS/LOL conditions to prevent random
data from being presented to the system.
Note: This input has a weak internal pulldown.
11,14,18,21,
25
VDD
3.3 V
Supply Voltage.
Nominally 3.3 V.
12
13
DIN+
DIN–
ISee Table 2
Differential Data Input.
Clock and data are recovered from the differential
signal present on these pins. AC coupling is recom-
mended.
15
GND
Production Test Input.
This pin is used during production testing and must
be tied to GND for normal operation.
Table 8. Si5013 Pin Descriptions (Continued)
Pin #
Pin Name
I/O
Signal Level
Description
相關(guān)PDF資料
PDF描述
GBC18DRTI-S734 CONN EDGECARD 36POS DIP .100 SLD
ECM25DCTN CONN EDGECARD 50POS DIP .156 SLD
XR16V554IL-0A-EVB EVAL BOARD FOR XR16V554 48QFN
RPP30-2424SW CONV DC/DC 30W 9-36VIN 24VOUT
1-5492191-7 CA SM LDS SCAPC-SC/UPC(NG)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SI5013-X-GM 制造商:未知廠家 制造商全稱:未知廠家 功能描述:OC-12/3, STM-4/1 SONET/SDH CDR IC WITH LIMITING AMPLIFIER
SI-50141-F 功能描述:CONN MAGJACK 1PT 10/100BTX G/Y RoHS:是 類別:連接器,互連式 >> 模塊 - 帶磁性元件的插座 系列:MagJack® ST SI-50000 標(biāo)準(zhǔn)包裝:63 系列:Mag45 連接器類型:RJ45 端口數(shù):1 行數(shù):1 安裝類型:面板安裝,通孔,直角 速度:10/100 Base-T 板上方高度:0.555"(14.10mm) LED 顏色:綠 - 綠 每一插座芯體的數(shù)目:5 屏蔽:屏蔽 翼片方向:上 特點(diǎn):板鎖 包裝:托盤
SI-50142 制造商:BEL 制造商全稱:Bel Fuse Inc. 功能描述:SI-50142
SI-50143 制造商:BEL 制造商全稱:Bel Fuse Inc. 功能描述:SI-50143
SI-50144 制造商:BEL 制造商全稱:Bel Fuse Inc. 功能描述:SI-50144