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參數(shù)資料
| 型號(hào)： | SL28SRC01BZIT |
| 廠商： | Silicon Laboratories Inc |
| 文件頁(yè)數(shù)： | 4/11頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC CLOCK PCIE GEN3/2 DIF 16TSSOP |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 類型： | * |
| PLL： | 是 |
| 輸入： | 時(shí)鐘，晶體 |
| 輸出： | 時(shí)鐘 |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 1:1 |
| 差分 - 輸入:輸出： | 無(wú)/是 |
| 頻率 - 最大： | 100MHz |
| 除法器/乘法器： | 無(wú)/無(wú) |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | * |
| 封裝/外殼： | * |
| 供應(yīng)商設(shè)備封裝： | * |
| 包裝： | * |
SL28SRC01
DOC#: SP-AP-0015 (Rev. 0.2)
Page 2 of 11
Pin Definitions
The SL28SRC01 requires a Parallel Resonance Crystal.
Substituting a series resonance crystal causes the
SL28SRC01 to operate at the wrong frequency and violates
the ppm specification. For most applications there is a
300-ppm frequency shift between series and parallel crystals
due to incorrect loading.
Crystal Loading
Crystal loading plays a critical role in achieving low ppm perfor-
mance. To realize low ppm performance, use the total capac-
itance the crystal sees to calculate the appropriate capacitive
loading (CL).
shows a typical crystal configuration using the two
trim capacitors. It is important that the trim capacitors are in
series with the crystal. It is not true that load capacitors are in
parallel with the crystal and are approximately equal to the
load capacitance of the crystal.
Calculating Load Capacitors
In addition to the standard external trim capacitors, consider
the trace capacitance and pin capacitance to calculate the
crystal loading correctly. Again, the capacitance on each side
is in series with the crystal. The total capacitance on both side
is twice the specified crystal load capacitance (CL). Trim
Pin No.
Name
Type
Description
1
XIN
I
14.318 MHz Crystal input.
2
VDD
PWR 3.3V power supply
3
VDD
PWR 3.3V power supply
4
VSS
GND
Ground
5
VDD
PWR 3.3V power supply
6
VSS
GND
Ground
7
SRC1
O, DIF 100 MHz Differential serial reference clocks.
8
SRC1#
O, DIF 100 MHz Differential serial reference clocks.
9
VSS
GND
Ground
10
VDD
PWR 3.3V power supply
11
VDD
PWR 3.3V power supply
12
VSS
GND
Ground
13
VDD
PWR 3.3V power supply
14
SSON
I
3.3V LVTTL input for enabling spread spectrum clock
0 = Disable, 1 = Enable (-0.5% SS)
Extrenal 10K ohm pull-up or pull-down resistor required
15
VSS
GND
Ground
16
XOUT
O
14.318 MHz Crystal output.
Table 1. Crystal Recommendations
Frequency
(Fund)
Cut
Loading
Load Cap
Drive
(max.)
Shunt Cap
(max.)
Motional
(max.)
Tolerance
(max.)
Stability
(max.)
Aging
(max.)
14.31818 MHz
AT
Parallel
20 pF
0.1 mW
5 pF
0.016 pF
35 ppm
30 ppm
5 ppm
Figure 1. Crystal Capacitive Clarification
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SL28SRC02BZC | 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 PCIE Clk Gen 14.318M Xin 2PCIE out Gen3 RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
| SL28SRC02BZCT | 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 PCIE Clk Gen 14.318M Xin 2PCIE out Gen3 RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
| SL28SRC02BZCTR | 制造商:Silicon Laboratories Inc 功能描述: |
| SL28SRC02BZI | 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 PCIE Clk Gen Xin 14M -->4 PCIE out Gen3 RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
| SL28SRC02BZIT | 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 PCIE Clk Gen Xin 14M -->4 PCIE out Gen3 RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
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