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參數(shù)資料
| 型號： | SL28SRC04BZIT |
| 廠商： | Silicon Laboratories Inc |
| 文件頁數(shù)： | 5/13頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CLOCK 4PCIE GEN3 20TSSOP |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 類型： | * |
| PLL： | 是 |
| 輸入： | 時鐘，晶體 |
| 輸出： | 時鐘 |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 1:4 |
| 差分 - 輸入:輸出： | 無/是 |
| 頻率 - 最大： | 100MHz |
| 除法器/乘法器： | 無/無 |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | * |
| 封裝/外殼： | * |
| 供應(yīng)商設(shè)備封裝： | * |
| 包裝： | * |
SL28SRC04
............. Document #: SP-AP-0757 (Rev. 0.2) Page 13 of 13
The information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice. Sil-
icon Laboratories assumes no responsibility for errors and omissions, and disclaims responsibility for any consequences resulting from the
use of information included herein. Additionally, Silicon Laboratories assumes no responsibility for the functioning of undescribed features or
parameters. Silicon Laboratories reserves the right to make changes without further notice. Silicon Laboratories makes no warranty, repre-
sentation or guarantee regarding the suitability of its products for any particular purpose, nor does Silicon Laboratories assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation conse-
quential or incidental damages. Silicon Laboratories products are not designed, intended, or authorized for use in applications intended to
support or sustain life, or for any other application in which the failure of the Silicon Laboratories product could create a situation where per-
sonal injury or death may occur. Should Buyer purchase or use Silicon Laboratories products for any such unintended or unauthorized appli-
cation, Buyer shall indemnify and hold Silicon Laboratories harmless against all claims and damages.
Document History Page
Document Title: SL28SRC04 PCI Express Gen 2 & Gen 3 Clock Generator
Document #: SP-AP-0757 (Rev. 0.2)
REV.
Issue Date
Orig. of
Change
Description of Change
1.0
10/28/09
JMA
New Datasheet
1.1
11/06/09
JMA
Updated Figure 4
AA
10/20/10
TRP
1. Updated block diagram with I2C logic
2. Removed crystal recommendations
3. Updated miscellanous text content
AA
11/15/10
TRP
1. Added JEDEC standard for MSL parameter
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