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參數(shù)資料
| 型號： | SLTS102A |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 14-A 12V-Input Adjustable Integrated Switching Regulator |
| 中文描述： | 14 -阿12V的輸入可調(diào)集成開關穩(wěn)壓器 |
| 文件頁數(shù)： | 5/8頁 |
| 文件大小： | 194K |
| 代理商： | SLTS102A |
For technical support and more information, see inside back cover or visit www.ti.com
Application Notes
Using the Standby Function of the PT6725
Series of Integrated Switching Regulators
The PT6725 series of power modules are high efficiency
regulators that operate off a +12V input bus voltage.
These regulators incorporate an on/off ‘
Standby’
func-
tion, which may be used to disable the regulator output.
The standby function is provided by the
STBY*
control,
pin 2. If pin 2 is left open-circuit the regulator operates
normally, and provides a regulated output when a valid
supply voltage is applied to V
in
(pins 4–6) with respect to
GND (pins 8–12). If a low voltage
3
is then applied to
pin 2 the regulator output will be disabled and the input
current drawn by the ISR will be reduced to 0.5mA
1
.
The standby control may also be used to hold-off the
regulator output during the period that input power is
applied.
Pin 2 is ideally controlled with an open-collector (or
open-drain) discrete transistor (See Figure 1). The open-
circuit voltage is typcially the input voltage V
in
. Table 1
gives the circuit parameters for this control input.
Table 1 Standby Control Requirements
(2, 3)
Parameter
Min
Typ
Max
Input Low (V
IL
)
I
stby
(pin 2 =ground)
V
stby
(open circuit)
–0.1V
—
—
+0.4V
—
—
–0.5mA
V
in
Notes:
1. When the regulator output is disabled the current drawn
from the +V
in
input source is typically reduced to 0.5mA.
2 The standby control input requires no external pull-up
resistor. The open-circuit voltage of the STBY* pin is
approximately th input voltage V
in
(+12V).
3. The standby control input is
Not
compatible with TTL
devices that incorporate a totem-pole output drive. Use
only a true open-collector device, preferably a discrete
bipolar transistor (or MOSFET). To ensure the regulator
output is disabled, the control pin must be pulled to less
than 0.4Vdc with a low-level 0.5mA sink to ground.
4. After Q
1
in Figure 1 is turned off and before the output
begins to rise, the regulator output will assert a low
impedance to ground. If an external voltage is applied to
the output it will sink current and possibly over-stress the
part.
Figure 1
Turn-On Time:
In the circuit of Figure 1, turning Q
1
on
applies a low voltage to the STBY control (pin 2) and
disables the regulator ouput. Correspondingly, turning
Q
1
off removes the low-voltage signal and enables the
output. Once enabled, the output will typically experience
a 10–15ms delay followed by a predictable ramp-up of
voltage. The regulator should provide a fully regulated
output voltage within 30ms. Figure 2 shows the output
voltage response, V
o
, of a PT6726 (2.5V) following the
turn-off of Q
1
. The turn-off of Q
1
corresponds to the
rise in V
stby
. The waveform was measured with a 12Vdc
input voltage, and 9.3ADC resistive load.
Figure 2
PT6725
Sense(+)
Sense(–)
V
OUT
GND
Vo(adj)
V
IN
STBY*
13–16
17
7
1
8–12
4–6
2
C
OUT
+
C
IN
+
STBY
+V
in
GND
GND
V
out
Q1
BSS138
PT6725 Series
Vo (1V/Div)
Vstby (10V/Div)
HORIZ SCALE: 5ms/Div
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