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參數(shù)資料
| 型號： | SM320C30HFGM50 |
| 廠商： | Texas Instruments, Inc. |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | DIGITAL SIGNAL PROCESSOR |
| 中文描述： | 數(shù)字信號處理器 |
| 文件頁數(shù)： | 12/47頁 |
| 文件大小： | 726K |
| 代理商： | SM320C30HFGM50 |
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SGUS014H FEBRUARY 1991 REVISED JUNE 2004
12
POST OFFICE BOX 1443
HOUSTON, TEXAS 772511443
electrical characteristics over recommended ranges of supply voltage (unless otherwise noted)
(see Note 5)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VOH
High-level output voltage
VDD = MIN,
VDD = MIN,
VDD = MIN,
VDD = MAX
VI = VSS to VDD
Inputs with internal pullups (see Note 7)
IOH = MAX
IOL = MAX
IOL = MAX
2.4
3
V
VOL
Low-level output voltage
For XA12XA0
0.6*
V
All others
0.3
0.6
±
20
±
10
20
±
50
V
μ
A
μ
A
μ
A
μ
A
IZ
II
IIP
IIC
High-impedance current
Input current
Input current
600
Input current (X2/CLKIN)
VI = VSS to VDD
°
VDD = MAX, TA = 25 C,
tc(CI) = MIN, See Note 8
VDD = 5 V, TA = 25
°
C
ICC
Supply current
200
600
mA
IDD
Ci
Co
Cx
For conditions shown as MIN/MAX, use the appropriate value specified in recommended operating conditions.
All typical values are at VDD = 5 V, TA = 25
°
C.
* This parameter is not production tested.
NOTES:
5. All input and output voltage levels are TTL compatible.
7. Pins with internal pullup devices: INT0INT3, MC/MP, RSV0RSV10. Although RSV0RSV10 have internal pullup devices,
external pullups should be used on each pin as identified in the pin function tables.
8. Actual operating current is less than this maximum value. This value was obtained under specially produced worst-case test
conditions, which are not sustained during normal device operation. These conditions consist of continuous parallel writes of a
checkerboard pattern to both primary and expansion buses at the maximum rate possible. See
Calculation of TMS320C30 Power
Dissipation Application Report
(literature number SPRA020)
.
Supply current, standby; IDLE2, clock shut off
50
mA
Input capacitance
15*
pF
Output capacitance
20*
pF
X2/CLKIN capacitance
25*
pF
PARAMETER MEASUREMENT INFORMATION
Tester Pin
Electronics
VLOAD
IOL
CT
IOH
Output
Under
Test
Where:
IOL
IOH
VLOAD= Selected to emulate 50
termination (typical value = 1.54 V).
CT
= 80-pF typical load-circuit capacitance
= 2 mA (all outputs)
= 300
μ
A (all outputs)
Figure 4. Test Load Circuit
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