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參數(shù)資料
| 型號： | SN54ABTH16823WD |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 18-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS |
| 中文描述： | 18位總線接口倒裝3觸發(fā)器態(tài)輸出 |
| 文件頁數(shù)： | 7/9頁 |
| 文件大?。?/td> | 133K |
| 代理商： | SN54ABTH16823WD |
SN54ABTH16823, SN74ABTH16823
18-BIT BUS-INTERFACE FLIP-FLOPS
WITH 3-STATE OUTPUTS
SCBS664B – APRIL 1996 – REVISED MAY 1997
7
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
timing requirements over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (see Figure 1)
VCC = 5 V,
TA = 25
°
C
MIN
SN54ABTH16823
SN74ABTH16823
UNIT
MAX
MIN
MAX
MIN
MAX
fclock
Clock frequency
0
150
0
150
0
150
MHz
tw
Pulse duration
CLR low
3.3
3.3
3.3
ns
CLK high or low
3.3
3.3
3.3
CLR inactive
1.6
2
1.6
tsu
Setup time before CLK
↑
Data
1.7
1.7
1.7
ns
CLKEN low
2.8
2.8
2.8
th
Hold time after CLK
↑
Data
1.2
1.2
1.2
ns
CLKEN low
0.6
0.6
0.6
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature, C
L
= 50 pF (unless otherwise noted) (see Figure 1)
SN54ABTH16823
VCC = 5 V,
TA = 25
°
C
MIN
TYP
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
MIN
MAX
UNIT
MAX
fmax
tPLH
tPHL
tPHL
tPZH
tPZL
tPHZ
tPLZ
150
150
MHz
CLK
Q
1.6
3.9
5.5
1.6
7.7
ns
2.1
3.9
5.4
2.1
6.4
CLR
Q
1.9
4.1
6
1.9
6.9
ns
OE
Q
1
3.1
4.2
1
5.1
ns
1.5
3.5
4.6
1.5
5.7
OE
Q
2.2
1.6
4.3
4.3
6
2.2
1.6
6.8
9.9
ns
6.4
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature, C
L
= 50 pF (unless otherwise noted) (see Figure 1)
SN74ABTH16823
VCC = 5 V,
TA = 25
°
C
MIN
TYP
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
MIN
MAX
UNIT
MAX
fmax
tPLH
tPHL
tPHL
tPZH
tPZL
tPHZ
tPLZ
150
150
MHz
CLK
Q
1.6
3.9
5.5
1.6
6.8
ns
2.1
3.9
5.4
2.1
6
CLR
Q
1.9
4.1
6
1.9
6.7
ns
OE
Q
1
3.1
4.2
1
4.9
ns
1.5
3.5
4.6
1.5
5.5
OE
Q
2.2
1.6
4.3
4.3
5.6
6.4
2.2
1.6
6.1
8.7
ns
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