參數(shù)資料
型號(hào)： SN74ABT18502PM
廠商： TEXAS INSTRUMENTS INC
元件分類(lèi)： 總線收發(fā)器
英文描述： ABT SERIES, DUAL 9-BIT BOUNDARY SCAN REG TRANSCEIVER, TRUE OUTPUT, PQFP64
封裝： GREEN, PLASTIC, LQFP-64
文件頁(yè)數(shù)： 28/32頁(yè)
文件大?。?/td> 578K
代理商： SN74ABT18502PM
SN74ABT18502
SCAN TEST DEVICE
WITH 18-BIT REGISTERED BUS TRANSCEIVER
SCBS753 – FEBRUARY 2002
5
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
test architecture
Serial test information is conveyed by means of a four-wire test bus or TAP that conforms to IEEE Std
1149.1-1990. Test instructions, test data, and test control signals are all passed along this serial test bus. The
TAP controller monitors two signals from the test bus, namely TCK and TMS. The function of the TAP controller
is to extract the synchronization (TCK) and state control (TMS) signals from the test bus and generate the
appropriate on-chip control signals for the test structures in the device. Figure 1 shows the TAP controller state
diagram.
The TAP controller is fully synchronous to the TCK signal. Input data is captured on the rising edge of TCK and
output data changes on the falling edge of TCK. This scheme ensures that data to be captured is valid for fully
one-half of the TCK cycle.
The functional block diagram shows the IEEE Std 1149.1-1990 four-wire test bus and boundary-scan
architecture and the relationship between the test bus, the TAP controller, and the test registers. As illustrated,
the device contains an 8-bit instruction register (IR) and four test data registers (DRs): an 84-bit boundary-scan
register (BSR), a 21-bit boundary-control register (BCR), a 1-bit bypass register, and a 32-bit device
identification register (IDR).
Test-Logic-Reset
Run-Test/Idle
Select-DR-Scan
Capture-DR
Shift-DR
Exit1-DR
Pause-DR
Update-DR
TMS = L
TMS = H
TMS = L
TMS = H
TMS = L
TMS = H
TMS = L
TMS = H
TMS = L
Exit2-DR
Select-IR-Scan
Capture-IR
Shift-IR
Exit1-IR
Pause-IR
Update-IR
TMS = L
TMS = H
TMS = L
TMS = H
TMS = L
TMS = H
TMS = L
Exit2-IR
TMS = L
TMS = H
TMS = L
TMS = H
TMS = L
TMS = H
TMS = L
Figure 1. TAP Controller State Diagram
相關(guān)PDF資料
PDF描述
SN74ABT18504PMRG4 ABT SERIES, 20-BIT BOUNDARY SCAN REG TRANSCEIVER, TRUE OUTPUT, PQFP64
SN74ABT18640DGGR ABT SERIES, DUAL 9-BIT BOUNDARY SCAN TRANSCEIVER, INVERTED OUTPUT, PDSO56
SN74ABT18640DLR ABT SERIES, DUAL 9-BIT BOUNDARY SCAN TRANSCEIVER, INVERTED OUTPUT, PDSO56
SN74ABT2240ADWRG4 ABT SERIES, DUAL 4-BIT DRIVER, INVERTED OUTPUT, PDSO20
SN74ABT2240APWE4 ABT SERIES, DUAL 4-BIT DRIVER, INVERTED OUTPUT, PDSO20
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SN74ABT18502PMG4 功能描述:特定功能邏輯 W/18-Bit Univ Bus Trncvr RoHS:否 制造商:Texas Instruments 產(chǎn)品: 系列:SN74ABTH18502A 工作電源電壓:5 V 封裝 / 箱體:LQFP-64 封裝:Tube
SN74ABT18502PMR 功能描述:特定功能邏輯 W/18-Bit Univ Bus Trncvr RoHS:否 制造商:Texas Instruments 產(chǎn)品: 系列:SN74ABTH18502A 工作電源電壓:5 V 封裝 / 箱體:LQFP-64 封裝:Tube
SN74ABT18502PMRG4 功能描述:特定功能邏輯 W/18-Bit Univ Bus Trncvr RoHS:否 制造商:Texas Instruments 產(chǎn)品: 系列:SN74ABTH18502A 工作電源電壓:5 V 封裝 / 箱體:LQFP-64 封裝:Tube
SN74ABT18502PN 制造商:TI 功能描述:74ABT18502 S1A4B
SN74ABT18504 制造商:TI 制造商全稱:Texas Instruments 功能描述:SCAN TEST DEVICES WITH 20-BIT UNIVERSAL BUS TRANSCEIVERS
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*