參數(shù)資料
型號(hào): SN74ABT8952DL
廠商: Texas Instruments
文件頁(yè)數(shù): 29/31頁(yè)
文件大小: 0K
描述: IC SCAN-TEST-DEV/XCVR 28-SSOP
標(biāo)準(zhǔn)包裝: 40
系列: 74ABT
邏輯類型: 掃描測(cè)試設(shè)備,帶寄存總線收發(fā)器
電源電壓: 4.5 V ~ 5.5 V
位數(shù): 8
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 28-BSSOP(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 28-SSOP
包裝: 管件
產(chǎn)品目錄頁(yè)面: 925 (CN2011-ZH PDF)
其它名稱: 296-4115-5
SN54ABT8952, SN74ABT8952
SCAN TEST DEVICES WITH
OCTAL REGISTERED BUS TRANSCEIVERS
SCBS121D – AUGUST 1992 – REVISED JULY 1996
7
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Exit1-DR, Exit2-DR
The Exit1-DR and Exit2-DR states are temporary states that end a data-register scan. It is possible to return
to the Shift-DR state from either Exit1-DR or Exit2-DR without recapturing the data register.
On the first falling edge of TCK after entry to Exit1-DR, TDO goes from the active state to the
high-impedance state.
Pause-DR
No specific function is performed in the stable Pause-DR state, in which the TAP controller can remain
indefinitely. The Pause-DR state suspends and resumes data-register scan operations without loss of data.
Update-DR
If the current instruction calls for the selected data register to be updated with current data, then such update
occurs on the falling edge of TCK, following entry to the Update-DR state.
Capture-IR
When an instruction-register scan is selected, the TAP controller must pass through the Capture-IR state. In
the Capture-IR state, the instruction register captures its current status value. This capture operation occurs
on the rising edge of TCK, upon which the TAP controller exits the Capture-IR state.
For the ’ABT8952, the status value loaded in the Capture-IR state is the fixed binary value 10000001.
Shift-IR
Upon entry to the Shift-IR state, the instruction register is placed in the scan path between TDI and TDO and,
on the first falling edge of TCK, TDO goes from the high-impedance state to an active state. TDO enables to
the logic level present in the least-significant bit of the instruction register.
While in the stable Shift-IR state, instruction data is serially shifted through the instruction register on each TCK
cycle. The first shift occurs on the first rising edge of TCK after entry to the Shift-IR state (i.e., no shifting occurs
during the TCK cycle in which the TAP controller changes from Capture-IR to Shift-IR or from Exit2-IR to
Shift-IR). The last shift occurs on the rising edge of TCK, upon which the TAP controller exits the Shift-IR state.
Exit1-IR, Exit2-IR
The Exit1-IR and Exit2-IR states are temporary states that end an instruction-register scan. It is possible to
return to the Shift-IR state from either Exit1-IR or Exit2-IR without recapturing the instruction register.
On the first falling edge of TCK after entry to Exit1-IR, TDO goes from the active state to the
high-impedance state.
Pause-IR
No specific function is performed in the stable Pause-IR state, in which the TAP controller can remain
indefinitely. The Pause-IR state suspends and resumes instruction-register scan operations without loss
of data.
Update-IR
The current instruction is updated and takes effect on the falling edge of TCK, following entry to the
Update-IR state.
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