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參數(shù)資料
| 型號： | SNJ54AC563W |
| 廠商： | Texas Instruments, Inc. |
| 元件分類： | 通用總線功能 |
| 英文描述： | OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS |
| 中文描述： | 八路?- 3型透明鎖存態(tài)輸出 |
| 文件頁數(shù)： | 2/13頁 |
| 文件大小： | 392K |
| 代理商： | SNJ54AC563W |
SCAS552C NOVEMBER 1995 REVISED OCTOBER 2003
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
description/ordering information (continued)
To ensure the high-impedance state during power up or power down, OE should be tied to V
CC
through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
FUNCTION TABLE
(each latch)
INPUTS
OUTPUT
Q
OE
L
LE
H
D
H
L
L
H
L
H
L
L
X
Q0
Z
H
X
X
logic diagram (positive logic)
OE
LE
1D
1Q
1
11
2
19
To Seven Other Channels
C1
1D
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
CC
Input voltage range, V
I
(see Note 1)
Output voltage range, V
O
(see Note 1)
Input clamp current, I
IK
(V
I
< 0 or V
I
> V
CC
)
Output clamp current, I
OK
(V
O
< 0 or V
O
> V
CC
)
Continuous output current, I
O
(V
O
= 0 to V
CC
)
Continuous current through V
CC
or GND
Package thermal impedance,
θ
JA
(see Note 2): DB package
0.5 V to 7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DW package
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
N package
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
NS package
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PW package
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES:
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
0.5 V to V
CC
+ 0.5 V
0.5 V to V
CC
+ 0.5 V
±
20 mA
±
20 mA
±
50 mA
±
200 mA
70
°
C/W
58
°
C/W
69
°
C/W
60
°
C/W
83
°
C/W
65
°
C to 150
°
C
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