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參數(shù)資料
| 型號： | SP6120 |
| 英文描述： | Fixed Frequency, Voltage Mode, Synchronous PWM Controller(固定頻率，電壓模式同步PWM（脈寬調(diào)制控制器）) |
| 中文描述： | 固定頻率，電壓模式，同步PWM控制器（固定頻率，電壓模式同步的PWM（脈寬調(diào)制控制器）） |
| 文件頁數(shù)： | 11/20頁 |
| 文件大小： | 187K |
| 代理商： | SP6120 |
11
P
Rev. 2/15/01
SP6120 Low Voltage, AnyFET
TM
, Synchronous, Buck Controller Copyright 2001 Sipex Corporation
Secondary Loop (continued)
Notice that the output voltage appears to coast
toward the regulated value during periods where
the main loop would be telling the drivers to
switch. It is during this interval that the 3%
window comparator has taken control away from
the main loop. The main loop regains control
only if the output voltage crosses through its
regulated value. Also notice where the 3%
comparator takes over. The output voltage is
considered “high” only if the trough of the ripple
is above 3%. The output voltage is considered
“l(fā)ow” only if the peak of the ripple is below 3%.
By managing the secondary loop in this fashion,
the SP6120 can improve the transient response
of high performance power converters without
causing strange disturbances in low to moderate
performance systems.
Driver Logic
Signals from the PWM latch (QPWM), Fault
latch (FAULT), Program Logic, Zero Crossing
Comparator, and 3% Window Comparators all
flow into the Driver Logic. The following is a
truth table for determining the state of the GH
and GL voltages for given inputs:
As with all synchronous designs, care must be
taken to ensure that the MOSFETs are properly
chosen for non-overlap time, peak current capa-
bility and efficiency.
E
L
B
A
T
H
T
U
R
T
C
G
O
L
R
E
V
D
T
L
U
A
F
1
1
0
0
0
0
0
0
0
0
r
M
M
O
W
C
P
Q
3
P
%
X
X
1
1
0
0
0
0
0
0
T
E
F
P
E
F
N
N
P
N
P
N
P
N
P
N
P
C
S
N
O
C
X
X
X
X
C
C
D
D
D
D
S
S
O
R
C
O
R
E
Z
X
X
X
X
X
X
0
0
1
1
H
G
0
1
1
0
0
1
0
1
0
1
L
G
0
0
0
0
1
1
1
1
0
0
GATE DRIVER TEST CONDITONS
5V
90%
10%
GH (GL)
2V
5V
GH (GL)
2V
NON-OVERLAP
RISE TIME
FALL TIME
90%
10%
V(BST)
0V
GH
V(V
CC
)
0V
GL
V(V
CC
= V
IN
)
SWN
~0V
~V(Diode) V
~2V(V
IN
)
BST
~V(V
IN
)
TIME
The QPWM and 3% Comparators are grouped
together because 3% Low is the same as QPWM
= 1 and 3% High is the same as QPWM = 0.
Output Drivers
The driver stage consists of one high side, 4
driver, GH and one low side, 4
, NFET driver,
GL. As previously stated, the high side driver
can be configured to drive a PFET or an NFET
high side switch. The high side driver can also be
configured as a switch node referenced driver.
Due to voltage constraints, this mode is manda-
tory for 5V, single supply, high side NFET
applications. The following figure shows typi-
cal driver waveforms for the 5V, high side NFET
design.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SP6122ACU-15 | Low Voltage, Micro 8, PFET, Buck Controller Ideal for 1A to 5A, Small Footprint, DC-DC Power Converters |
| SP6122CU | Evaluation Board Manual |
| SP6122EB | Evaluation Board Manual |
| SP6122UEB | Evaluation Board Manual |
| SP6122ACU-1.5 | Low Voltage, Micro 8, PFET, Buck Controller Ideal for 1A to 5A, Small Footprint, DC-DC Power Converters |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SP6120_05 | 制造商:SIPEX 制造商全稱:Sipex Corporation 功能描述:Low Voltage, AnyFETTM, Synchronous,Buck Controller Ideal for 2A to 10A, High Performance, DC-DC Power Converters |
| SP612-05 | 制造商:Delphi Corporation 功能描述:WIRE STOP |
| SP612-07 | 制造商:Delphi Corporation 功能描述:LOCATOR |
| SP612-08 | 制造商:Delphi Corporation 功能描述:PIVOT PIN |
| SP6120B | 制造商:SIPEX 制造商全稱:Sipex Corporation 功能描述:Low Voltage, AnyFETTM, Synchronous ,Buck Controller Ideal for 2A to 10A, High Performance, DC-DC Power Converters |
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