參數(shù)資料
型號： SPC5607BF1MLU6
廠商： Freescale Semiconductor
文件頁數(shù)： 1/112頁
文件大?。?/td> 0K
描述： IC MCU 32BIT 1.5MB FLASH 176LQFP
標準包裝： 200
系列： MPC56xx Qorivva
核心處理器： e200z0h
芯體尺寸： 32-位
速度： 64MHz
連通性： CAN，I²C，LIN，SCI，SPI
外圍設備： DMA，POR，PWM，WDT
輸入/輸出數(shù)： 149
程序存儲器容量： 1.5MB（1.5M x 8）
程序存儲器類型： 閃存
RAM 容量： 96K x 8
電壓 - 電源 (Vcc/Vdd)： 3 V ~ 5.5 V
數(shù)據(jù)轉換器： A/D 29x10b，5x12b
振蕩器型： 內部
工作溫度： -40°C ~ 125°C
封裝/外殼： 176-LQFP
包裝： 托盤
Freescale Semiconductor
Data Sheet: Technical Data
Document Number: MPC5607B
Rev. 7, 05/2013
Freescale Semiconductor, Inc., 2010-2013. All rights reserved.
MPC5607B
100 LQFP
14 mm x 14 mm
144 LQFP
20 mm x 20 mm
176 LQFP
24 mm x 24 mm
208 MAPBGA
17 mm x 17 mm
Single issue, 32-bit CPU core complex (e200z0h)
— Compliant with the Power Architecture technology
embedded category
— Enhanced instruction set allowing variable length
encoding (VLE) for code size footprint reduction.
With the optional encoding of mixed 16-bit and
32-bit instructions, it is possible to achieve
significant code size footprint reduction.
Up to 1.5 MB on-chip code flash memory supported with
the flash memory controller and ECC
64 (4 × 16) KB on-chip data flash memory with ECC
Up to 96 KB on-chip SRAM with ECC
Memory protection unit (MPU) with 8 region descriptors
and 32-byte region granularity on certain family
members (Refer to Table 1 for details.)
Interrupt controller (INTC) capable of handling 204
selectable-priority interrupt sources
Frequency modulated phase-locked loop (FMPLL)
Crossbar switch architecture for concurrent access to
peripherals, Flash, or RAM from multiple bus masters
16-channel eDMA controller with multiple transfer
request sources using DMA multiplexer
Boot assist module (BAM) supports internal Flash
programming via a serial link (CAN or SCI)
Timer supports I/O channels providing a range of 16-bit
input capture, output compare, and pulse width
modulation functions (eMIOS)
2 analog-to-digital converters (ADC): one 10-bit and one
12-bit
Cross Trigger Unit to enable synchronization of ADC
conversions with a timer event from the eMIOS or PIT
Up to 6 serial peripheral interface (DSPI) modules
Up to 10 serial communication interface (LINFlex)
modules
Up to 6 enhanced full CAN (FlexCAN) modules with
configurable buffers
1 inter-integrated circuit (I2C) interface module
Up to 149 configurable general purpose pins supporting
input and output operations (package dependent)
Real-Time Counter (RTC)
— Clock source from internal 128 kHz or 16 MHz
oscillator supporting autonomous wakeup with 1 ms
resolution with maximum timeout of 2 seconds
— Optional support for RTC with clock source from
external 32 kHz crystal oscillator, supporting
wakeup with 1 sec resolution and maximum timeout
of 1 hour
Up to 8 periodic interrupt timers (PIT) with 32-bit
counter resolution
Nexus development interface (NDI) per IEEE-ISTO
5001-2003 Class Two Plus
Device/board boundary scan testing supported per Joint
Test Action Group (JTAG) of IEEE (IEEE 1149.1)
On-chip voltage regulator (VREG) for regulation of input
supply for all internal levels
MPC5607B Microcontroller
Data Sheet
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