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參數(shù)資料
| 型號： | SPI73N03S2L-08 |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 英文描述： | OptiMOS Power-Transistor |
| 中文描述： | 的OptiMOS功率晶體管 |
| 文件頁數(shù)： | 2/8頁 |
| 文件大?。?/td> | 415K |
| 代理商： | SPI73N03S2L-08 |
2003-04-24
Page 2
SPI73N03S2L-08
SPP73N03S2L-08,SPB73N03S2L-08
Thermal Characteristics
Parameter
Symbol
Values
Unit
min.
typ.
max.
Characteristics
Thermal resistance, junction - case
R
thJC
R
thJA
-
0.9
1.4
K/W
SMD version, device on PCB:
@ min. footprint
@ 6 cm
2
cooling area
3)
-
-
-
-
62
40
Electrical Characteristics
, at
T
j
= 25 °C, unless otherwise specified
Parameter
Symbol
Values
Unit
min.
typ.
max.
Static Characteristics
Drain-source breakdown voltage
V
GS
=0V,
I
D
=1mA
Gate threshold voltage,
V
GS
=
V
DS
I
D
=55μA
Zero gate voltage drain current
V
(BR)DSS
30
-
-
V
V
GS(th)
1.2
1.6
2
V
DS
=30V,
V
GS
=0V,
T
j
=25°C
V
DS
=30V,
V
GS
=0V,
T
j
=175°C
Gate-source leakage current
I
DSS
-
-
0.01
10
1
100
μA
V
GS
=20V,
V
DS
=0V
Drain-source on-state resistance
I
GSS
-
1
100
nA
V
GS
=4.5V,
I
D
=36A
V
GS
=4.5V,
I
D
=36A, SMD version
Drain-source on-state resistance
4)
R
DS(on)
-
-
9.9
9.5
13.4
13.1
m
V
GS
=10V,
I
D
=36A
V
GS
=10V,
I
D
=36A, SMD version
R
DS(on)
-
-
6.8
6.5
8.4
8.1
1Current limited by bondwire ; with an
R
thJC
= 1.4K/W the chip is able to carry
I
D
= 87A at 25°C, for detailed
information see app.-note ANPS071E available at
www.infineon.com/optimos
2Defined by design. Not subject to production test.
3Device on 40mm*40mm*1.5mm epoxy PCB FR4 with 6cm2 (one layer, 70 μm thick) copper area for drain
connection. PCB is vertical without blown air.
4Diagrams are related to straight lead versions
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