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參數(shù)資料
| 型號： | SQ930C |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | High-Speed USB 2.0 Video Camera Controller |
| 中文描述： | 高速USB 2.0視頻攝像機控制器 |
| 文件頁數(shù)： | 15/20頁 |
| 文件大?。?/td> | 431K |
| 代理商： | SQ930C |
S
S
Q
Q
9
9
3
3
0
0
C
C
High-Speed USB 2.0 Video Camera Controller
T
ABLE
2–10: 8032 CPU I
NTERFACE
P
INS
(LQFP 80)
PIN NO
NAME
I/O
DESCRIPTION
10
CPU_P3.0
O
Port 3 - 0, output port only
11
CPU_P3.1
I/O
Port 3 - 1, bi-directional I/O port
12, 14~20
CPU_P2.7~
CPU_P2.0
O
Microprocessor High Address Bus
21
CPU_PSEN
O
Program Store Enable is the read strobe to external program memory.
22~29
CPU_P1.7~
CPU_P1.0
I/O
Port 1 is an 8-bit bi-directional I/O port.
33~40
CPU_P0.7~
CPU_P0.0
I/O
Microprocessor Data / Low Address Bus
43
CPU_ALE
O
Address Latch Enable
Output pulse for latching the low byte of the address during accesses to
external memory
T
ABLE
2–11: USB I
NTERFACE
P
INS
(LQFP 80)
PIN NO
NAME
I/O
DESCRIPTION
2
RPU
I
Connect external resistor (1.5k
Ω
±
0.1%) to AVCC (Analog power 3.3V)
3
DMRS
I/O
USB1.1 data in Data negative pin terminal, connecting to external resistor
(39
± 0.1%)
4
DPRS
I/O
USB1.1 data in Data positive pin terminal, connecting to external resistor
(39
± 0.1%)
52
SUSPEND
O
Device entry normal mode when drive ‘L’
Device entry suspend mode when high impedance
66
USB_POWER
I
Connect to the USBVCC pin of USB Connector
78
RREF
I
Connect external reference resistor (12.1k
Ω
±
0.1%) to Analog ground
79
DM
I/O
USB2.0 data pin Data negative pin terminal
80
DP
I/O
USB2.0 data pin Data positive pin terminal
T
ABLE
2–12: CMOS S
ENSOR
I
NTERFACE
P
INS
(LQFP 80)
PIN NO
NAME
I/O
DESCRIPTION
59
SEN_CLK_OUT
O
CMOS Sensor Clock Output
60
SEN_HCLK
I
CMOS Sensor Master Clock
61
SEN_HSYNC
I
CMOS Sensor Vertical Synchronization Signal
62
SEN_VSYNC
I
CMOS Sensor Horizontal Synchronization Signal
63, 64, 51~44
SEN_DATA[9:0]
I
Sensor Image Data [9:0]
Subject to Change Without Notice.
PAGE 15
Version 1.3 - April 22
nd
, 2005
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