參數(shù)資料
型號(hào): SRC4194IPAGT
英文描述: 4-Channel, Asynchronous Sample Rate Converter
中文描述: 4通道,異步采樣率轉(zhuǎn)換器
文件頁數(shù): 29/40頁
文件大?。?/td> 502K
代理商: SRC4194IPAGT
"#$%#
SBFS025A JUNE 2004 REVISED JULY 2004
www.ti.com
29
CONTROL REGISTER DEFINITIONS
(Software Mode Only)
This section contains descriptions for each control and status register available in Software mode. Reset defaults are also
shown for each register bit.
Register 1. System Control Register
D7
(MSB)
PDN
D6
D5
0
D4
D3
D2
D1
D0
(LSB)
MODE0
TRACK
MUTE
BYPASS
MODE2
MODE1
MODE[2:0]
Audio Serial Port Mode
These bits are used to select the Slave or Master mode status of the input and output serial ports.
MODE2
0
0
0
0
1
1
1
1
MODE1
0
0
1
1
0
0
1
1
MODE0
0
1
0
1
0
1
0
1
AUDIO SERIAL PORT MODE
Both Serial Ports are in Slave Mode (default)
Output Serial Port is Master with RCKI = 128fs
Output Serial Port is Master with RCKI = 512fs
Output Serial Port is Master with RCKI = 256fs
Both Serial Ports are in Slave Mode
Input Serial Port is Master with RCKI = 128fs
Input Serial Port is Master with RCKI = 512fs
Input Serial Port is Master with RCKI = 256fs
BYPASS
Bypass Mode
This bit is logically OR’d with the bypass input (BYPA or BYPB) for the corresponding SRC section.
BYPASS
0
1
FUNCTION
Bypass Mode disabled with normal ASRC operation. (default)
Bypass Mode enabled with data routed directly from the input port to the output port, bypass-
ing the ARSC function.
MUTE
Output Soft Mute
This bit is logically OR’d with the MUTE input (MUTEA or MUTEB) for the corresponding SRC section.
MUTE
0
1
OUTPUT MUTE FUNCTION
Soft mute disabled. (default)
Soft mute enabled with output data attenuated to all 0s.
TRACK
Digital Attenuation Tracking
TRACK
0
ATTENUATION TRACKING
Tracking Off: Attenuation for the Left and Right channels is controlled independently by Con-
trol Register 4 and Control Register 5. (default)
Tracking On: Left channel attenuation setting is used for both channels.
1
PDN
Power-Down
Setting this bit to 0 will force the corresponding SRC section into Soft Power-Down mode. All other register
settings are preserved and the SPI port remains active. Setting this bit to 1 will power up the corresponding
SRC section using the current register settings.
This bit defaults to 0 on power-up or reset. It must be programmed to 1 by the user in order to enable normal
operation for the corresponding SRC section.
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