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參數(shù)資料
| 型號： | SSM2166SZ-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 20/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC PREAMP AUDIO MONO MIC 14SOIC |
| 產(chǎn)品變化通告： | Material Change 25/Mar/2009 |
| 標準包裝： | 1 |
| 類型： | AB 類 |
| 輸出類型： | 1-通道（單聲道） |
| 電源電壓： | 4.5 V ~ 5.5 V |
| 特點： | 麥克風 |
| 安裝類型： | 表面貼裝 |
| 供應商設備封裝： | 14-SOICN |
| 封裝/外殼： | 14-SOIC（0.154"，3.90mm 寬） |
| 包裝： | 標準包裝 |
| 產(chǎn)品目錄頁面： | 775 (CN2011-ZH PDF) |
| 其它名稱： | SSM2166SZ-REEL7DKR |
Data Sheet
SSM2166
Rev. E | Page 9 of 20
The gain of the VCA at the rotation point is set by the value of a
resistor, RGAIN, connected between Pin 2 and GND. The relationship
range can be as high as 60 dB. The VCAIN pin (Pin 3) is the non-
inverting input terminal to the VCA. The inverting input of the
VCA is available at the VCAR pin (Pin 4) and exhibits an input
impedance of 1 k, as well. As a result, this pin can be used for
differential inputs or for the elimination of grounding problems
by connecting a capacitor whose value equals that used in series
The output impedance of the SSM2166 is typically less than 75 ,
and the external load on Pin 13 should be >5 k. The nominal
output dc voltage of the device is approximately 2.2 V. Use a
blocking capacitor for grounded loads.
The bandwidth of the SSM2166 is quite wide at all gain settings.
The upper 3 dB point is approximately 30 kHz at gains as high as
60 dB (using the input buffer for additional gain, circuit bandwidth
is unaffected). The gain bandwidth (GBW) plots are shown in
Figure 11. The lower 3 dB cutoff frequency of the SSM2166 is
set by the input impedance of the VCA (1 k) and C6. While the
noise of the input buffer is fixed, the input referred noise of the
VCA is a function of gain. The VCA input noise is designed to
be a minimum when the gain is at a maximum, thereby optimizing
the usable dynamic range of the part. A plot of wideband peak-
to-peak output noise is shown in Figure 10.
LEVEL DETECTOR
The SSM2166 incorporates a full-wave rectifier and true rms
level detector circuit whose averaging time constant is set by
an external capacitor connected to the AVG CAP pin (Pin 8).
For optimal low frequency operation of the level detector
down to 10 Hz, the value of the capacitor should be 2.2 F.
Some experimentation with larger values for the AVG CAP
may be necessary to reduce the effects of excessive low frequency
ambient background noise. The value of the averaging capacitor
affects sound quality: too small a value for this capacitor may
cause a pumping effect for some signals, while too large a value
may result in slow response times to signal dynamics. Electrolytic
capacitors are recommended for lowest cost and should be in
the range of 2 F to 47 F. Capacitor values from 18 F to 22 F
have been found to be more appropriate in voice-band applications
where capacitors on the low end of the range seem more
appropriate for music program material.
The rms detector filter time constant is approximately given by
10 × CAVG milliseconds, where CAVG is in F. This time constant
controls both the steady-state averaging in the rms detector as
well as the release time for compression; that is, the time it takes
for the system gain to react when a large input is followed by
a small signal. The attack time, the time it takes for the gain to
be reduced when a small signal is followed by a large signal, is
controlled partly by the AVG CAP value but is mainly controlled by
internal circuitry that speeds up the attack for large level changes.
This limits overload time to less than 1 ms in most cases.
BUFFER
1k
BUF OUT
VCAIN
VOUT
VCAR
4
3
5
14
RMS
LEVEL
DETECTOR
VCA
1
2
13
9
11
SSM2166
POWER DOWN
GND
AVG CAP
COMP
RATIO SET
GAIN ADJUST
OUTPUT
NOISE GATE SET
ROTATION SET
–IN
AUDIO
+IN
C1
0.1F
R2
10k
R1
10k
1F
+
C6
10F
C7
10F (OPTIONAL)
+
RCOMP
CAVG
2.2F
V+
00357-
016
8
10
12
CONTROL
CIRCUIT
6
7
RGAIN
RGATE
RROT PT
V+
Figure 16. Functional Block Diagram and Typical Application
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