參數(shù)資料
型號: ST10F168-Q2
廠商: STMICROELECTRONICS
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 25 MHz, MICROCONTROLLER, PQFP144
封裝: 28 X 28 MM, PLASTIC, QFP-144
文件頁數(shù): 36/76頁
文件大?。?/td> 483K
代理商: ST10F168-Q2
ST10F168
41/76
Figure 13 : Internal (simplified) Reset Circuitry
The minimum reset circuit of Figure 14 is not ade-
quate when the RSTIN pin is driven from the
ST10F168 itself during software or watchdog trig-
gered resets, because of the capacitor C1 that will
keep the voltage on RSTIN pin above VIL after the
end of the internal reset sequence, and thus will
triggered an asynchronous reset sequence.
Figure 14 shows an example of a reset circuit. In
this example, R1C1 external circuit is only used to
generate power-up or manual reset, and R0C0
circuit on VPP is used for power-up reset and to
exit from powerdown mode. Diode D1 creates a
wired-OR gate connection to the reset pin and
may be replaced by open-collector schmitt trigger
buffer. Diode D2 provides a faster cycle time for
repetitive power-on resets.
R2 is an optional pullup for faster recovery and
correct biasing of TTL Open Collector drivers.
RSTOUT
EINIT Instruction
Trigger
Clr
Clock
Reset State
Machine
Reset Sequence
(512 CPU Clock Cycles)
SRST instruction
watchdog overflow
RSTIN
VCC
BDRSTEN
VCC
VPP (Flash device)
VPP
Weak Pulldown
(~200
A)
From/to Exit
Powerdown
Circuit
Asynchronous
Reset
Clr
Q
Set
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