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參數(shù)資料
| 型號： | ST16C554DIQ64-F |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 23/39頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC UART FIFO 16B QUAD 64LQFP |
| 標準包裝： | 160 |
| 特點： | * |
| 通道數(shù)： | 4，QUART |
| FIFO's： | 16 字節(jié) |
| 規(guī)程： | RS232 |
| 電源電壓： | 2.97 V ~ 5.5 V |
| 帶自動流量控制功能： | 是 |
| 帶故障啟動位檢測功能： | 是 |
| 帶調制解調器控制功能： | 是 |
| 帶CMOS： | 是 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 64-LQFP |
| 供應商設備封裝： | 64-LQFP（10x10） |
| 包裝： | 托盤 |
| 其它名稱： | 1016-1268 |
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ST16C554/554D
3
REV. 4.0.1
2.97V TO 5.5V QUAD UART WITH 16-BYTE FIFO
PIN DESCRIPTIONS
Pin Description
NAME
64-LQFP
PIN #
68-PLCC
PIN#
TYPE
DESCRIPTION
DATA BUS INTERFACE
A2
A1
A0
22
23
24
32
33
34
I
Address data lines [2:0]. These 3 address lines select one of the internal regis-
ters in UART channel A-D during a data bus transaction.
D7
D6
D5
D4
D3
D2
D1
D0
60
59
58
57
56
55
54
53
5
4
3
2
1
68
67
66
I/O
Data bus lines [7:0] (bidirectional).
IOR#
(VCC)
40
52
I
When 16/68# pin is HIGH, the Intel bus interface is selected and this input
becomes read strobe (active low). The falling edge instigates an internal read
cycle and retrieves the data byte from an internal register pointed by the address
lines [A2:A0], puts the data byte on the data bus to allow the host processor to
read it on the rising edge.
When 16/68# pin is LOW, the Motorola bus interface is selected and this input is
not used and should be connected to VCC.
IOW#
(R/W#)
9
18
I
When 16/68# pin is HIGH, it selects Intel bus interface and this input becomes
write strobe (active low). The falling edge instigates the internal write cycle and
the rising edge transfers the data byte on the data bus to an internal register
pointed by the address lines.
When 16/68# pin is LOW, the Motorola bus interface is selected and this input
becomes read (HIGH) and write (LOW) signal.
CSA#
(CS#)
7
16
I
When 16/68# pin is HIGH, this input is chip select A (active low) to enable chan-
nel A in the device.
When 16/68# pin is LOW, this input becomes the chip select (active low) for the
Motorola bus interface.
CSB#
(A3)
11
20
I
When 16/68# pin is HIGH, this input is chip select B (active low) to enable chan-
nel B in the device.
When 16/68# pin is LOW, this input becomes address line A3 which is used for
channel selection in the Motorola bus interface.
CSC#
(A4)
38
50
I
When 16/68# pin is HIGH, this input is chip select C (active low) to enable chan-
nel C in the device.
When 16/68# pin is LOW, this input becomes address line A4 which is used for
channel selection in the Motorola bus interface.
CSD#
(VCC)
42
54
I
When 16/68# pin is HIGH, this input is chip select D (active low) to enable chan-
nel D in the device.
When 16/68# pin is LOW, this input is not used and should be connected VCC.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| ST16C554DIQ64TR-F | 功能描述:UART 接口集成電路 QUAD UART W/16 BYTE FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| ST16C554ECQ64 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecommunication IC |
| ST16C554EDCJ68 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecommunication IC |
| ST16C554EDCQ64 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecommunication IC |
| ST16C554EDIJ68 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecommunication IC |
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