REV. 5.0.2 2.97V TO 5.5V QUAD UART WITH 64-BYTE FIFO 49 NOTICE EXAR Corporation reserves the right to make changes to t" />
參數(shù)資料
型號(hào)： ST16C654DIQ64-F
廠商： Exar Corporation
文件頁(yè)數(shù)： 44/51頁(yè)
文件大?。?/td> 0K
描述： IC UART FIFO 64B QUAD 64LQFP
標(biāo)準(zhǔn)包裝： 160
特點(diǎn)： *
通道數(shù)： 4，QUART
FIFO's： 64 字節(jié)
規(guī)程： RS232
電源電壓： 2.97 V ~ 5.5 V
帶自動(dòng)流量控制功能： 是
帶IrDA 編碼器/解碼器： 是
帶故障啟動(dòng)位檢測(cè)功能： 是
帶調(diào)制解調(diào)器控制功能： 是
帶CMOS： 是
安裝類型： 表面貼裝
封裝/外殼： 64-LQFP
供應(yīng)商設(shè)備封裝： 64-LQFP（10x10）
包裝： 托盤
其它名稱： 1016-1271
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ST16C654/654D
REV. 5.0.2
2.97V TO 5.5V QUAD UART WITH 64-BYTE FIFO
49
NOTICE
EXAR Corporation reserves the right to make changes to the products contained in this publication in order to
improve design, performance or reliability. EXAR Corporation assumes no responsibility for the use of any
circuits described herein, conveys no license under any patent or other right, and makes no representation that
the circuits are free of patent infringement. Charts and schedules contained here in are only for illustration
purposes and may vary depending upon a user’s specific application. While the information in this publication
has been carefully checked; no responsibility, however, is assumed for inaccuracies.
EXAR Corporation does not recommend the use of any of its products in life support applications where the
failure or malfunction of the product can reasonably be expected to cause failure of the life support system or
to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless
EXAR Corporation receives, in writing, assurances to its satisfaction that: (a) the risk of injury or damage has
been minimized; (b) the user assumes all such risks; (c) potential liability of EXAR Corporation is adequately
protected under the circumstances.
Copyright 2005 EXAR Corporation
Datasheet August 2005.
Send your UART technical inquiry with technical details to hotline: uarttechsupport@exar.com.
Reproduction, in part or whole, without the prior written consent of EXAR Corporation is prohibited.
REVISION HISTORY
DATE
REVISION
DESCRIPTION
October 2003
Rev 5.00
Changed to standard style single-column format. Text descriptions were clarified and
simplified (eg. DMA operation, FIFO mode vs. Non-FIFO mode operations etc). Clari-
fied timing diagrams. Renamed Rclk (Receive Clock) to Bclk (Baud Clock) and timing
symbols. Added TCS, TRWS and TRST.Renamed FIFORdy register to FSTAT register.
March 2005
Rev 5.0.1
Added separate spec for External Clock Frequency in AC Electrical Characteristics.
August 2005
Rev 5.0.2
Updated the 1.4mm-thick Quad Flat Pack package description from "TQFP" to
"LQFP" to be consistent with JEDEC and Industry norms.
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