參數(shù)資料
型號(hào)： ST622XC-KIT
英文描述： STARTER KIT DATASHEET FOR ST620X. ST621X AND ST622X
中文描述： 入門(mén)套件部件的ST620X。 ST621X及ST622X
文件頁(yè)數(shù)： 12/84頁(yè)
文件大?。?/td> 969K
代理商： ST622XC-KIT
12/84
ST62T28C/E28C
1.4 PROGRAMMING MODES
1.4.1 Option Bytes
The two Option Bytes allow configuration capabili-
ty to the MCUs. Option byte’s content is automati-
cally read, and the selected options enabled, when
the chip reset is activated.
It can only be accessed during the programming
mode. This access is made either automatically
(copy from a master device) or by selecting the
OPTION BYTE PROGRAMMING mode of the pro-
grammer.
The option bytes are located in a non-user map.
No address has to be specified.
EPROM Code Option Byte (LSB)
EPROM Code Option Byte (MSB)
D15-D13.
Reserved. Must be cleared.
ADC SYNCHRO.
When set, an A/D conversion is
started upon WAIT instruction execution, in order
to reduce supply noise. When this bit is low, an A/
D conversion is started as soon as the STA bit of
the A/D Converter Control Register is set.
UART FRAME
.
When set, UART transmission
and reception are based on a 11-bit frame. When
cleared, a 10-bit frame is used.
D10.
Reserved
.
EXTCNTL.
External STOP MODE control
.
. When
EXTCNTL is high, STOP mode is available with
watchdog active by setting NMI pin to one. When
EXTCNTL is low, STOP mode is not available with
the watchdog active.
LVD.
LVD RESET enable.
When this bit is set, safe
RESET is performed by MCU when the supply
voltage is too low. When this bit is cleared, only
power-on reset or external RESET are active.
PROTECT
.
Readout Protection.
This bit allows the
protection of the software contents against piracy.
When the bit PROTECT is set high, readout of the
OTP contents is prevented by hardware.. When
this bit is low, the user program can be read.
OSCIL
.
Oscillator selection
. When this bit is low,
the oscillator must be controlled by a quartz crys-
tal, a ceramic resonator or an external frequency.
When it is high, the oscillator must be controlled by
an RC network, with only the resistor having to be
externally provided.
PORT PULL.
Port Pull-Up.
This bit must be set
high to disable pull-up at reset on the I/O port.
When this bit is low,I/O ports are in input with pull-
up.
D4.
Reserved. Must be cleared to zero.
NMI PULL.
NMI Pull-Up
. This bit must be set high
to configure the NMI pin with a pull-up resistor.
When it is low, no pull-up is provided
.
TIM PULL.
TIM Pull-Up
. This bit must be set high
to configure the TIMER pin with a pull-up resistor.
When it is low, no pull-up is provided
.
WDACT
. This bit controls the watchdog activation.
When it is high, hardware activation is selected.
The software activation is selected when WDACT
is low.
OSGEN
.
Oscillator Safe Guard
. This bit must be
set high to enable the Oscillator Safe Guard.
When this bit is low, the OSG is disabled.
The Option byte is written during programming ei-
ther by using the PC menu (PC driven Mode) or
automatically (stand-alone mode).
7
0
PRO-
TECT
OSCIL
PORT
PULL
-
NMI
PULL
TIM
PULL
WDACT
OS-
GEN
15
8
-
-
-
ADC
SYNCHRO
UART
FRAME
-
EXTC-
NTL
LVD
12
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