參數(shù)資料
型號(hào): ST62T03CM6E
廠商: STMICROELECTRONICS
元件分類: 微控制器/微處理器
英文描述: 8-BIT, OTPROM, 8 MHz, MICROCONTROLLER, PDSO16
封裝: 0.300 INCH, LEAD FREE, PLASTIC, SOP-16
文件頁(yè)數(shù): 15/100頁(yè)
文件大?。?/td> 1440K
代理商: ST62T03CM6E
ST6200C/ST6201C/ST6203C
21/100
CLOCK SYSTEM (Cont’d)
5.1.3
Low
Frequency
Auxiliary
Oscillator
(LFAO)
The Low Frequency Auxiliary Oscillator has three
main purposes. Firstly, it can be used to reduce
power consumption in non timing critical routines.
Secondly, it offers a fully integrated system clock,
without any external components. Lastly, it acts as
a backup oscillator in case of main oscillator fail-
ure.
This oscillator is available when the OSG ENA-
BLED option is selected in the option byte (refer to
the Option Bytes section of this document). In this
case, it automatically starts one of its periods after
the first missing edge of the main oscillator, what-
ever the reason for the failure (main oscillator de-
fective, no clock circuitry provided, main oscillator
switched off...). See Figure 11.
User code, normal interrupts, WAIT and STOP in-
structions, are processed as normal, at the re-
duced fLFAO frequency. The A/D converter accura-
cy is decreased, since the internal frequency is be-
low 1.2 MHz.
At power on, until the main oscillator starts, the re-
set delay counter is driven by the LFAO. If the
main oscillator starts before the 2048 cycle delay
has elapsed, it takes over.
The Low Frequency Auxiliary Oscillator is auto-
matically switched off as soon as the main oscilla-
tor starts.
5.1.4 Register Description
ADC CONTROL REGISTER (ADCR)
Address: 0D1h
Read/Write
Reset value: 0100 0000 (40h)
Bit 7:3, 1:0 = ADCR[7:3], ADCR[1:0] ADC Control
Register.
These bits are used to control the A/D converter (if
available on the device) otherwise they are not
used.
Bit 2 = OSCOFF Main Oscillator Off.
0: Main oscillator enabled
1: Main oscillator disabled
Note: The OSG must be enabled using the OS-
GEN option in the Option Byte, otherwise the OS-
COFF setting has no effect.
70
ADCR
7
ADCR
6
ADCR
5
ADCR
4
ADCR
3
OSC
OFF
ADCR
1
ADCR
0
1
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