參數(shù)資料
型號: ST6393
廠商: 意法半導體
英文描述: 8-BIT HCMOS MCUs FOR TV FREQUENCY SYNTHESIS WITH OSD
中文描述: 8位微控制器HCMOS電視頻率合成帶OSD
文件頁數(shù): 11/68頁
文件大小: 560K
代理商: ST6393
ST639x CORE
TheCoreoftheST639xFamily isimplementedinde-
pendently from the I/O or memory configuration.
Consequently,it can be treatedas an independent
centralprocessorcommunicatingwithI/Oandmem-
oryvia internaladdresses,data,andcontrolbusses.
The in-core communication is arranged as shown
in the followingblock diagram figure; the controller
being externallylinked to boththereset andthe os-
cillator, whilethecore is linkedto the dedicatedon-
chip macrocellsperipherals via the serial data bus
and indirectly for interrupt purposes through the
control registers.
Registers
The ST639x Family Core has five registers and
three pairs of flags available to the programmer.
They are shown in Figure 5 and are explained in
the following paragraphs together with the pro-
gram anddata memory page registers.
Accumulator (A).
Theaccumulatoris an 8-bit gen-
eral purpose register used in all arithmetic calcula-
tions, logical operations, and data manipulations.
The accumulatoris addressedin the dataspace as
RAMlocationat theFFhaddress.
Accordingly, the ST639x instruction set can use
the accumulator as any other register of the data
space.
Figure5. ST639x Core Block Diagram
SHORT
DIRECT
ADDRESSING
MODE
V REGISTER
W REGISTER
PROGRAMCOUNTER
SIX LEVELS
STACKREGISTER
C
C
C
Z
Z
Z
NORMAL FLAGS
INTERRUPT FLAGS
NMI FLAGS
INDEX
REGISTER
VA000423
b7
b7
b7
b7
b7
b0
b0
b0
b0
b0
b0
b11
ACCUMULATOR
Y REG. POINTER
X REG. POINTER
Figure 6. ST639x CoreProgramming Model
ST6391,92,93,95,97,99
7/64
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